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Message
From: rtl2gds@S...<rtl2gds@S...>
Date: Thu Aug 26 09:45:30 CEST 2004
Subject: [usb] timeout
> The delay specified to each is 7.5 bit times, hence a total of
> 15bit
> times, plus a delay of 2 bit times give a total of 17 bit times,
> Hence
> there is a delay of not more than 18bit times was specified.
> Hence the specification is 7.5 bit times only and this will reflect
> the
> same for the High speed.
> The SEO to J transistion is for EOP and not for resetting, but i
> couldnot
> properly connect your question with the SE0 to J tansistion.
> pranav
Hi,
I mean resetting/starting timeout timer not USB reset.
I understand spec like that:
For eg. when device receives setup token in control transfer it expects
data0 packet to arrive before timeout after setup token(18 bit times for
Full Speed). So, it starts timeout timer after succesfull reception of
SETUP (ie after EOP = SE0 to J transition) and check if timout occurs.
I am not sure, but timeout timer maybe should be set to value 18 bit
times minus SETUP packet length duration time in this example, because
timer starts after SETUP packet is received.
Am i right?
Michal
> > I would like to ask about timeout values in usb 2.0 core, why
> these
> > are
> > 622 ns FS(7.5b times) and 400 ns HS (192b times)?
> > Shouldn't these be 18 bit times in FS and 816 bit times in HS
> as
> > stated
> > in 7.1.18 of usb spec (end to end delay)?
> > And how timeout is checked? Is timeout counter started when
> > linestate
> > enters squelch level (or SE0 to J transition for FS) and reset
> when
> > linestate leaves squelch (or J to K transition for FS), when
> device
> > waits
> > for data or response from usb host)?
> >
> >
>
>
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