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Message
From: pranav_c_java@y...<pranav_c_java@y...>
Date: Mon Aug 16 08:56:28 CEST 2004
Subject: [usb] timeout
hi,
U need to recheck the specifications,
The specifications specify a time out of 7.5bit times and 192bit times
only and not 18 and 816.
The second part of Q,
The reset is done only at the starting of the device setup and there will
be J and K ie both D+ and D- high for 10 milliseconds.
The time out thing, i feel that there is counter used rather than SE0 to J
transistion ,as the SEO to J transistion is used to give a wakeup signal
to a device.
If u find something different, do enlighten me with it.
regards
pranav
----- Original Message -----
From: rtl2gds@S...<rtl2gds@S...>
To:
Date: Tue Jun 29 22:58:14 CEST 2004
Subject: [usb] timeout
> Hi,
>
> I would like to ask about timeout values in usb 2.0 core, why these
> are
> 622 ns FS(7.5b times) and 400 ns HS (192b times)?
> Shouldn't these be 18 bit times in FS and 816 bit times in HS as
> stated
> in 7.1.18 of usb spec (end to end delay)?
> And how timeout is checked? Is timeout counter started when
> linestate
> enters squelch level (or SE0 to J transition for FS) and reset when
> linestate leaves squelch (or J to K transition for FS), when device
> waits
> for data or response from usb host)?
>
>
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