LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Usb > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: Mohammad AK<perocletos@y...>
    Date: Thu Mar 4 19:04:50 CET 2004
    Subject: [usb] Design uses over 100 percent of one of the resources. USB11_CORE
    Top
    well I guess we have the same project here ;)
    first of all it seems u have an FPGA package other than BGA or FGA . which have much more pins ,
    In this case , the only solution u have is to reduce number of endpoints in the USB1_core. each endpoint consumes more than 40 pins.

    AbuKhater


    chadpham@h... wrote:
    Hi all,
    After down load the usb1_core, I use WebPack 4.2 and Spartan2E eval
    board to build the project. But when I come to the point
    for "implement design" WebPack generated the error with the message
    "Design uses over 100 percent of one of the resources." and more
    detail is
    "Number of External GCLKIOBs 1 out of 4 25%
    Number of External IOBs 305 out of 142 214%
    Number of LOCed External IOBs 0 out of 305 0%
    Number of SLICEs 681 out of 2352 28%
    Number of GCLKs 1 out of 4 25%"
    Look like the IO was use more than it shoud be. Please give me some
    advices for this matter. Anything is appreciated!
    The question is did I add in the project something more than it should
    be? And we have to do more initialization than just download and
    compile?
    Thank you all!
    _______________________________________________
    attachment.htm

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.