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From: a_karlstrom@y...<a_karlstrom@y...>
Date: Thu Mar 4 17:24:35 CET 2004
Subject: [usb] Suspend mode and FPGA:s
Hi!

I would like to know how to implement an IP core in a FPGA or CPLD and
still meet the requirement of maximum 500uA current consumprion in
suspend mode. Is this really possible or are the cores not intended for
bus powered devices? As far as I know there are no FPGA/CPLD that
can run on 500uA.
I'm thankful for any help!

Follow up	Author
[usb] Suspend mode and FPGA:s	Rick Collins