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Message
From: ZhiPLiu <zpingl@2...>
Date: Wed, 27 Mar 2002 05:15:11 +0100
Subject: [usb] clk of the SIE
Hi all,
Is the clk of SIE the output clk of PHY chip? and but on the
UTMI specification(version 1.05) the output clk is 48Mhz in fs only
operation,the data rates is 12M.why the output clk is 48Mhz. "A 'fs ony'
implementation of the utm would provide 32 clk cycles per byte time" is
in the page 22 of the utmi specification,but "the clocking of a hs/fs utm
in fs only and ls only implementations,except that for fs only and ls only
implementations there are only 8 clk cycles per byte time" is on the
page 25. do they conflict.
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