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Message
From: "Luis J. Perez" <luis.perez@d...>
Date: Mon, 25 Feb 2002 10:24:53 +0100
Subject: Re: [usFrom owner-usb@o... Mon Feb 25 13:10:23 2002
Rudolf Usselmann wrote:
>
> On Sunday 24 February 2002 10:51 pm, you wrote:
> > Hello all,
> >
> > I intend to downgrade USB 2.0 core of OpenCores to USB 1.1
> > which will operate at Low and Full Speed rates. The reason
> > is to enrich cores' variety of OpenCores and to enable mass
> > testing of USB core in OpenCores community.
> >
> > Before I do that, I would like to know about your opinion. The
> > most important is from Mr. Rudolf Usselmann, the USB 2.0 core
> > creator. Also I knew from the project list that there is a USB host
> > controller project and according to USB archive, it is also a
> > function controller, not a host controller (p.s: I don't contact
> > its maintainer yet...). Thanks...
>
> Two suggestions:
>
> 1) There is no need to downgrade the core, as it will operate
> in all three modes (low, full and high) just fine. I think it would
> be a better idea to write a PHY that supports only low and full
> speed modes instead. That way one could test the complete
> solution at low and full speeds in an FPGA.
>
> 2) For only low and full speed, it might desirable to create a
> different host interface. instead of using shared SSRAM, FIFOs
> might be a better solution for many applications. It would be
> nice to be able to select between the SSRAM and FIFO
> interface.
>
> As to the "USB Host controller" project, it's bogus. It's a function
> project as well, and the authors seem to have misunderstood
> several important issues from the USB specification ... I have
> emailed the authors but never got a reply, I have also asked
> Damjan to remove the project, but that has not happened yet ...
>
> Cheers,
> rudi
>
> > Best regard,
> >
> >
> > RE Tambunan
>
I did a quick design for the first solution proposed by Rudi (a PHY that
supports low-full speed) . That was 2 or 3 months ago, and no longer
working on it. I'm not very proud of it, and I feel it could be better.
If you are really interested, please contact me...
========================================================
Luis Jose Perez Lafuente luis.perez@d...
Design Engineer
Digital Design Department
Design of Systems on Silicon http://www.ds2.es
Av. Charles Robert Darwin, 2 Phone. +34-96-136 60 04
Parc Tecnologic Ext. 152
46980 Paterna (VALENCIA) FAX +34-96-136 62 50
SPAIN
========================================================
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