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    Navigation: All forums > Pci > Message List > Message Post

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    From: make_u_play at yahoo.com<make_u_play@y...>
    Date: Fri Oct 26 05:10:07 CEST 2007
    Subject: [pci] Rookie questions about PCI
    Top
    Thanks Mark.

    I have had a chance to find some more information since I posted that
    message and have some followup questions.

    I read some of the datasheets for the bridge and was unclear about
    what is ment by Image. There are references to you can have several
    images.

    Also at this point would you suggest I continue research into PCI or
    would looking at PCI express be a better option? In some of the
    previous posts this months there has been discussion about xilinx having
    devices with hardcores for pci express, is this something like a
    peripheral unit eg. adc on a microcontroller if I can use that analogy,
    which I simply read and write to or is it just a permanently wired up IP
    core to which connections are made ie It has some preset parameters
    and is not as configurable.


    Correct me if I am wrong anywhere here but from what I have
    understood the Bridge IP core should allow me to do the following.

    I have my own PCI card that I put into a PC. On the PC side I have an
    application written in C# for example the role of which is to process the
    sampled data and graphically display it for the user. Once the
    application is started up it sends commands to the PCI card (card is
    now a target) the card inteprets the information and begins its data
    acquision. The acquired data is written to onboard DDR(2) SDRAM.

    Now this is where I am a bit unclear.

    Do I need to make an interrupt request to the host PC to get access to
    the bus or do I wait for there to be no traffic? (or is this handled by the
    bridge?)

    Once able to transmitt data I setup a DMA engine to shift the massive
    amount of sampled data to the host.

    Can you explain how the data is handled when it reaches the host?
    I'm completely new to the PCI interaction with the software side so this
    is a grey area at the moment.

    My application on the host accesses the data and processes it before
    generating images to display the data.


    Also the 100MB/s is not a major hassel since I will only be sampling for
    short periods and storing to ram I intend to have on the board, before
    sending it across to the PC.

    Regards,

    Greg

    ----- Original Message -----
    From: Mark McDougall<markm@v...>
    To:
    Date: Fri Oct 26 01:38:46 CEST 2007
    Subject: [pci] Rookie questions about PCI

    > G.Franco wrote:
    >
    > > What I want to accomplish is to build a device which can
    > sample data at
    > > a very high rate say 1GSa/s, buffer it to ram (if necessary)
    > and convey
    > > it to my computer for analysis via the PCI bus.
    > Just be aware that absolute maximum 32-bit PCI33 rate is around
    > 120MB/s,
    > and more likely 80-100MB/s sustained rate with nothing else on the
    > bus.
    > > Ok finally my questions. I have been reading up about PCI and
    > from an
    > > application perspective what exactly is the difference between
    > a PCI
    > > target, PCI master and PCI bridge? For example since I will be
    > putting
    > > the PCI card into my computer I will need a PCI target am I
    > correct? I
    > > am assuming that my PC will be a master and you cannot have
    > two masters
    > > or can you? Secondly with regard accessing the PCI card from
    > > application software on the PC side do I need to write special
    > PCI
    > > drivers or do I use generic drivers that are availible on a
    > windows xp
    > > machine?
    > A PCI Master can initiate PCI transactions. eg. PCI mobo, or
    > bus-mastering
    > card like DMA.
    > A PCI target can only respond to Master transactions. eg. data
    > acquisition
    > card without DMA.
    > A PCI Bridge connects a PCI bus to another PCI or non-PCI bus.
    > Technically
    > the opencores PCI bridge is exactly that - it bridges the PCI bus
    > and the
    > Wishbone bus.
    > You'll need to implement a target at least - or master if you want
    > a DMA
    > engine on your card. The opencores PCI bridge is suitable for both
    > purposes.
    > There can be many PCI masters on a bus - one arbiter which is > responsible > for granting access to masters that request the bus. Generally the > arbiter > is on a PC mobo. > As for drivers, depends on how you implement your device. It is > possible > to use generic drivers (like TVICPCI) that allow you to map device > resources into (Windows) user-space. I'm sure there's similar under > linux, > though writing a kernel driver module is a lot easier than windows. > > am also > > trying to get hold of a copy of PCI system Architecture by Tom > Shanley > > and Don Anderson - 3rd edition but my local bookstore said the > > publisher is out of stock at it will take a few weeks. > Good choice! > Regards, > -- > Mark McDougall, Engineer > Virtual Logic Pty Ltd, <http://www.vl.com.au> > 21-25 King St, Rockdale, 2216 > Ph: +612-9599-3255 Fax: +612-9599-3266 > >

    Follow upAuthor
    [pci] Rookie questions about PCIMark McDougall

     
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