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Message
From: Mau Liste<liste@s...>
Date: Tue Mar 27 09:50:37 CEST 2007
Subject: [pci] PCI Target
Mark McDougall wrote:
> Mau Liste wrote:
>
>> I prefer to use the PCI Target, because it looks more similar to what I
>> need, and because it is written in VHDL which I am more confident with.
>> My concern is that the PCI Target is marked as Beta.
>
>>From memory the target has several limitations:
> * only 1 BAR
> * 16-bit wishbone interface
> * no burst transfers
I have seen also that PAR is an output only so it does look like it can
only generate parity and not check it.
For this application, I can probably accept these limitations. But aside
from limitations ... does it work? It doesn't look much
maintained/documented, so I want to check if I am alone on that road, or
if there are others to share comments/bug fixes with.
>> On the other side, is it possible to tear down the full PCI Bridge with
>> only the functionality I need (some ifdefs, maybe)?
>
> The optimiser does a reasonable job without having to tear anything out.
I've see that, but what remains after tying unused input to gnd, does
not look much working (just tried few simulations). But I will continue
to check ...
Thanks all.
Mau.
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