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    Navigation: All forums > Pci > Message List > Message Post

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    From: sylvain.bernot at ifrance.com<sylvain.bernot@i...>
    Date: Mon Jul 3 18:31:39 CEST 2006
    Subject: [pci] VHDL Target Entity
    Top
    Hi,


    I'm currently using the opencore pci target entity (written in VHDL:
    v0.1 - Ovidiu Lupas - June 09, 2000).

    First i found 2 errors:

    line 38:
    "architecture Behavior of Target32PCI is"
    should be "architecture Behavior of TG32PCI is"
    as the entity is named TG32PCI.

    line 1233:
    "assert(CLK'Last_Event <= thold)"
    should be "assert(CLK'Last_Event >= thold)".

    I decided to make a testbench for this entity,
    I tried to do a read transaction by driving
    FRAME#, AD, C/BE#, IRDY# like shown in the pci specification
    (figure 3-5 page 47 of the pci specification revision 2.3)
    but the entity TG32PCI doesn't drive DEVSEL# nor TRDY#, and i must
    drive these signals to have a read transaction, but this way is no
    sense with the pci specification.
    Does anyone have already used this vhdl entity ? any help will be
    appreciated, thanks.

     
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