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From: Robert Lluís Garcia<rlluis@p...>
Date: Thu Dec 15 14:14:04 CET 2005
Subject: [pci] read conf space from wishbone
Hello,

I am trying to read the configuration space from the Wishbone side of the
bridge. I am using 32 zeros as address to read from because
WB_CONFIGURATION_BASE is defined all zeros in the file pci_user_constants.v:

// Base address for Configuration space access from WB bus. This value
cannot be changed during runtime
`define WB_CONFIGURATION_BASE 20'h0000_0

According to the documentation WB_CONFIGURATION_BASE are the 20 high bits.

With the code below I would like to get the first 32 bits of the
configuration space in the signal datum_from_conf_space but what I actually
read is some odd value.

Can anyone tell me what could be wrong?

Thanks in advance,
Robert

-----------------------------------------------------------------------------------

signal datum_from_conf_space: std_logic_vector(31 downto 0);
type state_type is (idle_state, do_state);

wbm_adr_o <= "00000000000000000000000000000000"; -- 32 zeros
wbm_sel_o <= "1111";
wbm_cti_o <= "000";
wbm_bte_o <= "00";

process (pci_clk_i, wb_rst_i)
begin
if wb_rst_i = '1' then
wbm_cyc_o <= '0';
wbm_stb_o <= '0';
curr_state <= idle_state;
elsif rising_edge(pci_clk_i) then
case curr_state is
when idle_state =>
wbm_cyc_o <= '1';
wbm_stb_o <= '1';
curr_state <= do_state;
end if;
when do_state =>
if wbm_ack_i = '1' then
datum_from_conf_space <= wbm_dat_i; --read from conf space
wbm_cyc_o <= '0';
wbm_stb_o <= '0';
curr_state <= idle_state;
end if;
end case;
end if;
end process;