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From: Wesley J. Landaker<wjl@i...>
Date: Sun Dec 4 17:09:13 CET 2005
Subject: [pci] offset
On Sunday 27 November 2005 08:32, keribikerberos (sent by Nabble.com) wrote:
> hi,
>
> i have a pci core up and running with my max-ii dev board. it has BAR0 -
> 1Mbyte and BAR1 256 bytes. IO read/write is fine but with offset 0h only,
>
> i'm wondering on how address (containing the offset) is coded in some
> ways, i know that selected DWORD is encoded in AD[7:0]

The selected "DWORD" is encoded in AD[7:2]; the byte-enables select the
bytes out of the word. What is in AD[1:0] depends on the type of
transaction taking place, it *isn't* the byte portion of the adderss.

--
Wesley J. Landaker <attachment.pgp