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Message
From: npd at aps.anl.gov<npd@a...>
Date: Fri Aug 5 19:37:18 CEST 2005
Subject: [pci] Question about BARs
Hi,I finally got the PCI core to work in my Altera application. Mainly
problems with Altera and my lack of PCI knowledge.
I have a question on how one determines on the Wishbone side which BAR
that the PCI side is trying to access? Since the BARs are configured
by the BIOS on power-up, the Wishbone side would not know which PCI
BAR is linked to the predefined memory/io space on the Wishbone side.
So how is this done? Would this be a good example of using the
Translation Address Reg?
Nick
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