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Message
From: Nicholas DiMonte<npd@a...>
Date: Thu Jul 28 18:11:27 CEST 2005
Subject: [pci] how the pci slot going to detect the pci card???
I would agree that the 8255 is impractical for any PCI design for real
world use, but for a Unv project it may be OK.
Put a side the limitations of the 8255, is the Opencores PCI IP core
unable to control such a simple device if the core was configured as a
GUEST where the PCI side would just write and read the 8255? I believe a
simple wishbone slave interface for the 8255 should be all that is
needed for this project. Please correct me if I'm wrong, I may not fully
understand this PCI core.
Calvin, all PCI devices must have a configuration register block which
is used to configure the PCI device during a power-up cycle or a system
reset. I would recommend a book titled "PCI System Architecture", which
should help with understanding how the device is mapped on the PCI bus
by using this configuration block. Also, I would recommend that you
download Wishbone spec plus all of the Opencore documentation for the
PCI core.
This PCI core from Opencores should work as a simple PCI target if you
set it up correctly, but it will require a little more work to disable
the PCI master controller in this core to accomplish this. I have not
done this myself, so I can't show you exactly how to do it at the
moment. Maybe someone on this forum may confirm or deny this statement,
that is, that this core can be used as a PCI target only core.
Nick
Wojciech Cynk ARCO wrote:
>In is impossible to use 8255 in any PCI design.
>
>
>----- Original Message -----
>From: <pci/attachments/20050728/6cfb69f4attachment-0001.html
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