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    Navigation: All forums > Pci > Message List > Message Post

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    From: jtrabal at engin.umass.edu<jtrabal@e...>
    Date: Thu Jul 14 20:34:09 CEST 2005
    Subject: [pci] PCI Bridge Error
    Top
    Hi,

    I am trying to implement the PCI Core in the MEMEC 2s200 Spartan II
    board and I am a little confused in terms of the process and what I
    really need from the PCI folder to implement the design. Please I need
    help. Thanks in advance.

    Regards,
    Jorge

    ----- Original Message -----
    From: TAN Joseph<Joseph.TAN@T...>
    To:
    Date: Thu Jul 14 04:03:46 CEST 2005
    Subject: [pci] PCI Bridge Error

    > Hi Mark,
    >
    > Well at least the PCI core itself looks OK. I haven't found any
    > actual bugs in the Verilog code once I got everything working.
    >
    > The actual Verilog source code looks very low-level and not easily
    > maintainable. How difficult would it be to extend the design for
    > 64-bit PCI and 64-bit WishBone bus?
    >
    > Cheers,
    > Joseph Tan
    > -----Original Message-----
    > From: pci-bounces at opencores.org [mailto:pci-bounces at
    > opencores.org]On
    > Behalf Of Mark McDougall
    > Sent: Thursday, 14 July 2005 10:30 AM
    > To: Discussion list about free, open source PCI IP core
    > Subject: Re: [pci] PCI Bridge Error
    > TAN Joseph wrote:
    > > Honestly, you'd expect the software support tool to actually
    > work. I
    > > can't even find the sourcecode for this tool to fix it. Some
    > of the
    > > 'defines were not valid numbers.
    > Heh, well, at the risk of biting the hand that feeds me, I've
    > learnt not
    > to expect anything more than what you can download from the
    > website. I'm
    > currently using the PCI core, DMA core, OCIDE core and the 16550
    > core
    > and I've come across a few problems which I've had to resolve
    > myself
    > after queries go unanswered.
    > Mind you, I'm not complaining - I understand people provide these
    > as-is
    > and then move on to other things and don't have time to support
    > them.
    > > For example: `define PCI_AT_EN0 20'hN_ 20-bits used to enable
    > Address
    > > Translation? What does "N_" mean?
    > No idea. I suspect it's a typo in the tool source. Wonder what the
    > tool
    > was written in?
    > Regards,
    > --
    > Mark McDougall, Software Engineer
    > Virtual Logic Pty Ltd, <http://www.vl.com.au>
    > 21-25 King St, Rockdale, 2216
    > Ph: +612-9599-3255 Fax: +612-9599-3266
    > _______________________________________________
    > http://www.opencores.org/mailman/listinfo/pci
    >
    >

     
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