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Message
From: "Radwin Zagala" <rzagala@s...>
Date: Wed, 9 Jul 2003 15:55:00 +0800
Subject: [pci] PCI core
Hi to everyone!
I'd like to ask the permission of the core authors if I could use this
pci core as starting point for a mini pci controller core. I'm currently
working on a project which requires the development of this.
In line with this, I'd like to ask some questions particular to
implementation details.
Is there a signal in the pci target unit which indicates that this block
is currently busy(that is both the pci target and wishbone master)?
Is there a way that I could add a signal that disables all flip-flops
and latches more of like a global disable for the whole core?
Thanks and regards to everyone.
Radwin
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