LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Pci > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: wuyunsheng <wuyunsheng@m...>
    Date: Thu, 20 Mar 2003 14:37:43 +0800
    Subject: [pci] SOS: about turnaround cycle
    Top

    hi all,
    
    my design containing a pci core(i design it myself) will be taped out soon. but just now i found out that in some circumstances there are no turn around cycles on AD and CBE signals when the bus driver changes. since it is on schedule to tape out, i am anxious to know whether i must modify rtl code to fix it.
    
    any advices are deeply appreciated.
    
    best regards.
    
    sumnow
    
    
    
    

    Follow upAuthor
    RE: [pci] SOS: about turnaround cycleTadej Markovic

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.