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    Navigation: All forums > Pci > Message List > Message Post

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    From: "Miha Dolenc" <mihad@o...>
    Date: Wed, 6 Mar 2002 10:16:47 +0100
    Subject: Re: [pci] Problems compiling PCI core and test bench for Modelsim
    Top

    Hi!
    
    Thanks for this. I can see why this wasn't working and I have no idea, why
    it worked for us - ncsim produced no messages - not even a warning, so we
    missed it. I have uploaded the repaired files right now, also some changes
    were made - a few testcases added and a bug fixed! So try downloading it
    again and see how it goes! Feel free to send any additional feedback!
    
    Regards,
    Miha Dolenc
    
    ----- Original Message -----
    From: "james a marek" <jamarek@r...>
    To: <pci@o...>
    Sent: Tuesday, March 05, 2002 11:16 PM
    Subject: [pci] Problems compiling PCI core and test bench for Modelsim
    
    
    > All:
    >
    > I am trying to compile this project with Modelsim and I get the following
    errors.  I downloaded the entire project and used the attached script to
    compile.  The compile.log file is my errors.  I can fix the errors, but this
    is making me wonder if I am missing something or have out of date files.  I
    have never used verilog before, but the free PCI core is very appealing so I
    thought I would evaluate it.  Any help would be much appreciated.
    >
    > Thanks,
    >
    > Jim
    
    
    ----------------------------------------------------------------------------
    ----
    
    
    >
    > rm -rf $PCI_TB_LIB
    > vlib $PCI_TB_LIB
    >
    > # CORE Compilation
    > # Level 0 (bottom Level)
    >     vlog -work $PCI_TB_LIB pci_target32_devs_crit.v
    >     vlog -work $PCI_TB_LIB pci_target32_stop_crit.v
    >     vlog -work $PCI_TB_LIB pci_target32_trdy_crit.v
    >     vlog -work $PCI_TB_LIB pci_target32_clk_en.v
    >     vlog -work $PCI_TB_LIB pci_decoder.v
    >     vlog -work $PCI_TB_LIB fifo_control.v
    >     vlog -work $PCI_TB_LIB pciw_fifo_control.v
    >     vlog -work $PCI_TB_LIB pci_tpram.v
    >     vlog -work $PCI_TB_LIB frame_en_crit.v
    >     vlog -work $PCI_TB_LIB cbe_en_crit.v
    >     vlog -work $PCI_TB_LIB mas_ad_en_crit.v
    >     vlog -work $PCI_TB_LIB mas_ch_state_crit.v
    >     vlog -work $PCI_TB_LIB mas_ad_load_crit.v
    >     vlog -work $PCI_TB_LIB irdy_out_crit.v
    >     vlog -work $PCI_TB_LIB frame_load_crit.v
    >     vlog -work $PCI_TB_LIB frame_crit.v
    >     vlog -work $PCI_TB_LIB synchronizer_flop.v
    >     vlog -work $PCI_TB_LIB decoder.v
    >     vlog -work $PCI_TB_LIB wbr_fifo_control.v
    >     vlog -work $PCI_TB_LIB wbw_fifo_control.v
    >     vlog -work $PCI_TB_LIB wb_tpram.v
    >     vlog -work $PCI_TB_LIB async_reset_flop.v
    > # Level 1
    >    vlog -work $PCI_TB_LIB serr_en_crit.v
    >    vlog -work $PCI_TB_LIB serr_crit.v
    >    vlog -work $PCI_TB_LIB perr_en_crit.v
    >    vlog -work $PCI_TB_LIB perr_crit.v
    >    vlog -work $PCI_TB_LIB par_crit.v
    >    vlog -work $PCI_TB_LIB out_reg.v
    >    vlog -work $PCI_TB_LIB pci_io_mux_ad_load_crit.v
    >    vlog -work $PCI_TB_LIB pci_io_mux_ad_en_crit.v
    >    vlog -work $PCI_TB_LIB sync_module.v
    >    vlog -work $PCI_TB_LIB pci_target32_sm.v
    >    vlog -work $PCI_TB_LIB pci_target32_interface.v
    >    vlog -work $PCI_TB_LIB pciw_pcir_fifos.v
    >    vlog -work $PCI_TB_LIB wb_master.v
    >    vlog -work $PCI_TB_LIB pci_master32_sm.v
    >    vlog -work $PCI_TB_LIB pci_master32_sm_if.v
    >    vlog -work $PCI_TB_LIB conf_cyc_addr_dec.v
    >    vlog -work $PCI_TB_LIB delayed_write_reg.v
    >    vlog -work $PCI_TB_LIB delayed_sync.v
    >    vlog -work $PCI_TB_LIB wb_addr_mux.v
    >    vlog -work $PCI_TB_LIB wbw_wbr_fifos.v
    >    vlog -work $PCI_TB_LIB wb_slave.v
    > # Level 2
    >   vlog -work $PCI_TB_LIB pci_rst_int.v
    >   vlog -work $PCI_TB_LIB pci_parity_check.v
    >   vlog -work $PCI_TB_LIB pci_in_reg.v
    >   vlog -work $PCI_TB_LIB cur_out_reg.v
    >   vlog -work $PCI_TB_LIB pci_io_mux.v
    >   vlog -work $PCI_TB_LIB conf_space.v
    >   vlog -work $PCI_TB_LIB pci_target_unit.v
    >   vlog -work $PCI_TB_LIB wb_slave_unit.v
    > # Level 3
    >  vlog -work $PCI_TB_LIB pci_bridge32.v
    > # Top Level
    > vlog -work $PCI_TB_LIB top.v
    >
    > #TEST BENCH Compilation
    > # Level 0 (bottom level)
    >   vlog -work $PCI_TB_LIB pci_behaviorial_target.v
    >   vlog -work $PCI_TB_LIB pci_behaviorial_master.v
    >   vlog -work $PCI_TB_LIB wb_master32.v
    > # Level 1
    >  vlog -work $PCI_TB_LIB pci_unsupported_commands_master.v
    >  vlog -work $PCI_TB_LIB pci_behavioral_iack_target.v
    >  vlog -work $PCI_TB_LIB pci_behaviorial_device.v
    >  vlog -work $PCI_TB_LIB pci_blue_arbiter.v
    >  vlog -work $PCI_TB_LIB pci_bus_monitor.v
    >  vlog -work $PCI_TB_LIB wb_slave_behavioral.v
    >  vlog -work $PCI_TB_LIB wb_master_behavioral.v
    >  vlog -work $PCI_TB_LIB wb_bus_mon.v
    > # Level 3 (top level)
    > vlog -work $PCI_TB_LIB system.v
    >
    
    
    ----------------------------------------------------------------------------
    ----
    
    
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_TARGET32_DEVS_CRIT
    >
    > Top level modules:
    > PCI_TARGET32_DEVS_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_TARGET32_STOP_CRIT
    >
    > Top level modules:
    > PCI_TARGET32_STOP_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_TARGET32_TRDY_CRIT
    >
    > Top level modules:
    > PCI_TARGET32_TRDY_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_TARGET32_CLK_EN
    >
    > Top level modules:
    > PCI_TARGET32_CLK_EN
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_DECODER
    >
    > Top level modules:
    > PCI_DECODER
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module FIFO_CONTROL
    >
    > Top level modules:
    > FIFO_CONTROL
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCIW_FIFO_CONTROL
    >
    > Top level modules:
    > PCIW_FIFO_CONTROL
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_TPRAM
    >
    > Top level modules:
    > PCI_TPRAM
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module FRAME_EN_CRIT
    >
    > Top level modules:
    > FRAME_EN_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module CBE_EN_CRIT
    >
    > Top level modules:
    > CBE_EN_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module MAS_AD_EN_CRIT
    >
    > Top level modules:
    > MAS_AD_EN_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module MAS_CH_STATE_CRIT
    >
    > Top level modules:
    > MAS_CH_STATE_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module MAS_AD_LOAD_CRIT
    >
    > Top level modules:
    > MAS_AD_LOAD_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module IRDY_OUT_CRIT
    >
    > Top level modules:
    > IRDY_OUT_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module FRAME_LOAD_CRIT
    >
    > Top level modules:
    > FRAME_LOAD_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module FRAME_CRIT
    >
    > Top level modules:
    > FRAME_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module synchronizer_flop
    >
    > Top level modules:
    > synchronizer_flop
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module DECODER
    >
    > Top level modules:
    > DECODER
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WBR_FIFO_CONTROL
    >
    > Top level modules:
    > WBR_FIFO_CONTROL
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WBW_FIFO_CONTROL
    >
    > Top level modules:
    > WBW_FIFO_CONTROL
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WB_TPRAM
    >
    > Top level modules:
    > WB_TPRAM
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module async_reset_flop
    >
    > Top level modules:
    > async_reset_flop
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module SERR_EN_CRIT
    >
    > Top level modules:
    > SERR_EN_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module SERR_CRIT
    >
    > Top level modules:
    > SERR_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PERR_EN_CRIT
    >
    > Top level modules:
    > PERR_EN_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PERR_CRIT
    >
    > Top level modules:
    > PERR_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PAR_CRIT
    >
    > Top level modules:
    > PAR_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module OUT_REG
    >
    > Top level modules:
    > OUT_REG
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_IO_MUX_AD_LOAD_CRIT
    >
    > Top level modules:
    > PCI_IO_MUX_AD_LOAD_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_IO_MUX_AD_EN_CRIT
    >
    > Top level modules:
    > PCI_IO_MUX_AD_EN_CRIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module SYNC_MODULE
    >
    > Top level modules:
    > SYNC_MODULE
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_TARGET32_SM
    >
    > Top level modules:
    > PCI_TARGET32_SM
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_TARGET32_INTERFACE
    >
    > Top level modules:
    > PCI_TARGET32_INTERFACE
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCIW_PCIR_FIFOS
    >
    > Top level modules:
    > PCIW_PCIR_FIFOS
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WB_MASTER
    >
    > Top level modules:
    > WB_MASTER
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_MASTER32_SM
    >
    > Top level modules:
    > PCI_MASTER32_SM
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_MASTER32_SM_IF
    >
    > Top level modules:
    > PCI_MASTER32_SM_IF
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module CONF_CYC_ADDR_DEC
    >
    > Top level modules:
    > CONF_CYC_ADDR_DEC
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module DELAYED_WRITE_REG
    >
    > Top level modules:
    > DELAYED_WRITE_REG
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module DELAYED_SYNC
    >
    > Top level modules:
    > DELAYED_SYNC
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WB_ADDR_MUX
    >
    > Top level modules:
    > WB_ADDR_MUX
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WBW_WBR_FIFOS
    >
    > Top level modules:
    > WBW_WBR_FIFOS
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WB_SLAVE
    >
    > Top level modules:
    > WB_SLAVE
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_RST_INT
    >
    > Top level modules:
    > PCI_RST_INT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_PARITY_CHECK
    >
    > Top level modules:
    > PCI_PARITY_CHECK
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_IN_REG
    >
    > Top level modules:
    > PCI_IN_REG
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module CUR_OUT_REG
    >
    > Top level modules:
    > CUR_OUT_REG
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_IO_MUX
    >
    > Top level modules:
    > PCI_IO_MUX
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module CONF_SPACE
    >
    > Top level modules:
    > CONF_SPACE
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_TARGET_UNIT
    >
    > Top level modules:
    > PCI_TARGET_UNIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WB_SLAVE_UNIT
    >
    > Top level modules:
    > WB_SLAVE_UNIT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_BRIDGE32
    >
    > Top level modules:
    > PCI_BRIDGE32
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module TOP
    >
    > Top level modules:
    > TOP
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module pci_behaviorial_target
    >
    > Top level modules:
    > pci_behaviorial_target
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module pci_behaviorial_master
    >
    > Top level modules:
    > pci_behaviorial_master
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WB_MASTER32
    >
    > Top level modules:
    > WB_MASTER32
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module pci_unsupported_commands_master
    >
    > Top level modules:
    > pci_unsupported_commands_master
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module PCI_BEHAVIORAL_IACK_TARGET
    > WARNING[10]: pci_behavioral_iack_target.v(111): Macro `BC_IACK is
    undefined
    > ERROR: pci_behavioral_iack_target.v(111): near ")": expecting: IDENT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module pci_behaviorial_device
    > -- Compiling module delayed_test_pad
    >
    > Top level modules:
    > pci_behaviorial_device
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module pci_blue_arbiter
    >
    > Top level modules:
    > pci_blue_arbiter
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module pci_bus_monitor
    >
    > Top level modules:
    > pci_bus_monitor
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WB_SLAVE_BEHAVIORAL
    > WARNING[10]: wb_slave_behavioral.v(153): Macro `FF_DELAY is undefined
    > WARNING[10]: wb_slave_behavioral.v(155): Macro `FF_DELAY is undefined
    > ERROR: wb_slave_behavioral.v(155): near ";": expecting: IDENT
    > WARNING[10]: wb_slave_behavioral.v(179): Macro `FF_DELAY is undefined
    > WARNING[10]: wb_slave_behavioral.v(181): Macro `FF_DELAY is undefined
    > ERROR: wb_slave_behavioral.v(181): near ";": expecting: IDENT
    > WARNING[10]: wb_slave_behavioral.v(188): Macro `FF_DELAY is undefined
    > WARNING[10]: wb_slave_behavioral.v(190): Macro `FF_DELAY is undefined
    > ERROR: wb_slave_behavioral.v(190): near ";": expecting: IDENT
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WB_MASTER_BEHAVIORAL
    >
    > Top level modules:
    > WB_MASTER_BEHAVIORAL
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module WB_BUS_MON
    >
    > Top level modules:
    > WB_BUS_MON
    > Model Technology ModelSim SE vlog 5.5d Compiler 2001.09 Aug 22 2001
    > -- Compiling module SYSTEM
    >
    > Top level modules:
    > SYSTEM
    >
    
    
    
    
    
    
    

    ReferenceAuthor
    [pci] Problems compiling PCI core and test bench for ModelsimJames a marek

     
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