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    Navigation: All forums > Cvs-checkins > Message List > Message Post

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    From: cvs at opencores.org<cvs@o...>
    Date: Sat Jul 26 21:15:31 CEST 2008
    Subject: [cvs-checkins] MODIFIED: wb_lpc ...
    Top
    Date: 00/08/07 26:21:15

    Modified: wb_lpc/examples/pci_lpc pci_lpc.ise pci_lpc_host.bit
    top_pci_lpc_host.v
    Log:
    Fix bugs:

    25-Jul-2008 LPC firmware writes must not insert wait-states.

    22-Jul-2008 LPC DMA does not report READY+MORE for multi-byte transfers



    Add feature:

    23-Jul-2008 propagate Wishbone errors across LPC interface



    Improve Testbench:

    Ability to test multiple wait-states on LPC Peripheral Wishbone Master interface.

    Check wbs_err_o from LPC Host.



    Rebuild examples with the fixes above.




    Revision Changes Path
    1.5 wb_lpc/examples/pci_lpc/pci_lpc.ise

    http://www.opencores.org/cvsweb.shtml/wb_lpc/examples/pci_lpc/pci_lpc.ise?rev=1.5&content-type=text/x-cvsweb-markup

    <<Binary file>>


    1.5 wb_lpc/examples/pci_lpc/pci_lpc_host.bit

    http://www.opencores.org/cvsweb.shtml/wb_lpc/examples/pci_lpc/pci_lpc_host.bit?rev=1.5&content-type=text/x-cvsweb-markup

    <<Binary file>>


    1.4 wb_lpc/examples/pci_lpc/top_pci_lpc_host.v

    http://www.opencores.org/cvsweb.shtml/wb_lpc/examples/pci_lpc/top_pci_lpc_host.v.diff?r1=1.3&r2=1.4

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: top_pci_lpc_host.v
    ===================================================================
    RCS file: /cvsroot/hharte/wb_lpc/examples/pci_lpc/top_pci_lpc_host.v,v
    retrieving revision 1.3
    retrieving revision 1.4
    diff -u -b -r1.3 -r1.4
    --- top_pci_lpc_host.v 10 Mar 2008 14:17:13 -0000 1.3
    +++ top_pci_lpc_host.v 26 Jul 2008 19:15:31 -0000 1.4
    @@ -1,6 +1,6 @@
    //////////////////////////////////////////////////////////////////////
    //// ////
    -//// $Id: top_pci_lpc_host.v,v 1.3 2008/03/10 14:17:13 hharte Exp $ ////
    +//// $Id: top_pci_lpc_host.v,v 1.4 2008/07/26 19:15:31 hharte Exp $ ////
    //// top_pci_lpc_host.v - Top Level for PCI to LPC Host ////
    //// for the Enterpoint Raggedstone1 PCI Card. Based on the ////
    //// OpenCores raggedstone project, and uses the OpenCores ////
    @@ -212,6 +212,7 @@
    .wbs_stb_i(wb_stb_o),
    .wbs_cyc_i(wb_cyc_o),
    .wbs_ack_o(wb_ack_i),
    + .wbs_err_o(wb_err_i),
    .dma_chan_i(dma_chan_i),
    .dma_tc_i(dma_tc_i),
    .lframe_o(lframe_o),



     
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