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    Navigation: All forums > Cvs-checkins > Message List > Message Post

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    From: cvs at opencores.org<cvs@o...>
    Date: Mon Jun 30 18:02:02 CEST 2008
    Subject: [cvs-checkins] MODIFIED: cryptosorter ...
    Top
    Date: 00/08/06 30:18:02

    Added: cryptosorter/memocodeDesignContest2008/aesCorePipelined
    AesPipeline.bsv aes_pipelined_cipher_top.v
    aes_pipelined_key_expand_128.v aes_pipelined_sbox.v
    Log:
    Initial checkin with actual source




    Revision Changes Path
    1.1 cryptosorter/memocodeDesignContest2008/aesCorePipelined/AesPipeline.bsv

    http://www.opencores.org/cvsweb.shtml/cryptosorter/memocodeDesignContest2008/aesCorePipelined/AesPipeline.bsv?rev=1.1&content-type=text/x-cvsweb-markup

    Index: AesPipeline.bsv
    ===================================================================
    //import Transfer::*;
    import Vector::*;
    import aesCipherTop::*;

    typedef Bit#(128) AES_block;
    typedef Bit#(128) AES_key;



    import "BVI" aes_cipher_top =
    module mkAESPipeline (AES);

    default_clock clk(clk);
    default_reset rst(rst);

    method text_out get_result() ready(done);
    method decrypt(text_in, key) ready(ready) enable(ld);

    schedule decrypt CF (get_result);
    schedule get_result CF (decrypt);

    schedule decrypt C decrypt;
    schedule get_result C get_result;

    endmodule

    /*interface AesTest;
    interface ProcSide procSide;
    endinterface

    module mkaestest(AesTest);
    Transfer transfer <- mkTransfer();

    AES crypto <- mkAESPipeline();

    Reg#(Bit#(4)) index <- mkReg(0);
    Reg#(Bit#(4)) count <- mkReg(0);
    Reg#(Bit#(6)) trans <- mkReg(0);
    Vector#(8,Reg#(AES_block)) storage <- replicateM(mkReg(0));

    AES_key key = {8'hB0, 8'h1D, 8'hFA, 8'hCE, 8'h0D, 8'hEC, 8'h0D, 8'hED,
    8'h0B, 8'hA1, 8'h1A, 8'hDE, 8'h0E, 8'hFF, 8'hEC, 8'h70};

    rule mkreq(index<8);
    crypto.decrypt({28'b0,index,96'b0},key);
    index <= index+1;
    endrule

    rule store(True);
    storage[count[2:0]] <= crypto.get_result();
    count <= count+1;
    endrule

    rule trans0((count>0 && trans==0) || trans==4 || trans==8 || trans==12 || trans==16 || trans==20 || trans==24 || trans==28);
    transfer.put(storage[trans[4:2]][31:0]);
    trans <= trans+1;
    endrule

    rule trans1(trans==1 || trans==5 || trans==9 || trans==13 || trans==17 || trans==21 || trans==25 || trans==29);
    transfer.put(storage[trans[4:2]][63:32]);
    trans <= trans+1;
    endrule

    rule trans2(trans==2 || trans==6 || trans==10 || trans==14 || trans==18 || trans==22 || trans==26 || trans==30);
    transfer.put(storage[trans[4:2]][95:64]);
    trans <= trans+1;
    endrule

    rule trans3(trans==3 || trans==7 || trans==11 || trans==15 || trans==19 || trans==23 || trans==27 || trans==31);
    transfer.put(storage[trans[4:2]][127:96]);
    trans <= trans+1;
    endrule

    interface ProcSide procSide = transfer.procSide;

    rule disp(count==8);
    $display("%x",storage[0]);
    $display("%x",storage[1]);
    $display("%x",storage[2]);
    $display("%x",storage[3]);
    $display("%x",storage[4]);
    $display("%x",storage[5]);
    $display("%x",storage[6]);
    $display("%x",storage[7]);
    endrule endmodule */ 1.1 cryptosorter/memocodeDesignContest2008/aesCorePipelined/aes_pipelined_cipher_top.v http://www.opencores.org/cvsweb.shtml/cryptosorter/memocodeDesignContest2008/aesCorePipelined/aes_pipelined_cipher_top.v?rev=1.1&content-type=text/x-cvsweb-markup Index: aes_pipelined_cipher_top.v =================================================================== module aes_pipelined_cipher_top(clk, rst, ld, ready, done, key, text_in, text_out ); input clk, rst; input ld; output ready; output done; input [127:0] key; input [127:0] text_in; output [127:0] text_out; //////////////////////////////////////////////////////////////////// // // Local Wires // wire [31:0] w0[9:0]; wire [31:0] w1[9:0]; wire [31:0] w2[9:0]; wire [31:0] w3[9:0]; reg [127:0] text_out; reg [7:0] sa00[9:0], sa01[9:0], sa02[9:0], sa03[9:0]; reg [7:0] sa10[9:0], sa11[9:0], sa12[9:0], sa13[9:0]; reg [7:0] sa20[9:0], sa21[9:0], sa22[9:0], sa23[9:0]; reg [7:0] sa30[9:0], sa31[9:0], sa32[9:0], sa33[9:0]; wire [7:0] sa00_next[9:0], sa01_next[9:0], sa02_next[9:0], sa03_next[9:0]; wire [7:0] sa10_next[9:0], sa11_next[9:0], sa12_next[9:0], sa13_next[9:0]; wire [7:0] sa20_next[9:0], sa21_next[9:0], sa22_next[9:0], sa23_next[9:0]; wire [7:0] sa30_next[9:0], sa31_next[9:0], sa32_next[9:0], sa33_next[9:0]; wire [7:0] sa00_sub[9:0], sa01_sub[9:0], sa02_sub[9:0], sa03_sub[9:0]; wire [7:0] sa10_sub[9:0], sa11_sub[9:0], sa12_sub[9:0], sa13_sub[9:0]; wire [7:0] sa20_sub[9:0], sa21_sub[9:0], sa22_sub[9:0], sa23_sub[9:0]; wire [7:0] sa30_sub[9:0], sa31_sub[9:0], sa32_sub[9:0], sa33_sub[9:0]; wire [7:0] sa00_sr[9:0], sa01_sr[9:0], sa02_sr[9:0], sa03_sr[9:0]; wire [7:0] sa10_sr[9:0], sa11_sr[9:0], sa12_sr[9:0], sa13_sr[9:0]; wire [7:0] sa20_sr[9:0], sa21_sr[9:0], sa22_sr[9:0], sa23_sr[9:0]; wire [7:0] sa30_sr[9:0], sa31_sr[9:0], sa32_sr[9:0], sa33_sr[9:0]; wire [7:0] sa00_mc[9:0], sa01_mc[9:0], sa02_mc[9:0], sa03_mc[9:0]; wire [7:0] sa10_mc[9:0], sa11_mc[9:0], sa12_mc[9:0], sa13_mc[9:0]; wire [7:0] sa20_mc[9:0], sa21_mc[9:0], sa22_mc[9:0], sa23_mc[9:0]; wire [7:0] sa30_mc[9:0], sa31_mc[9:0], sa32_mc[9:0], sa33_mc[9:0]; reg done, ld_r[9:0]; assign ready = 1'b1; integer i; //////////////////////////////////////////////////////////////////// // // Misc Logic // always @(posedge clk) if(!rst) ld_r[0] <= 1'b0; else ld_r[0] <= ld; always @(posedge clk) if (!rst) for(i=1; i<10; i=i+1) ld_r[i] <= 1'b0; else for(i=1; i<10; i=i+1) ld_r[i] <= ld_r[i-1]; always @(posedge clk) if (!rst) done <= 1'b0; else done <= ld_r[9]; //////////////////////////////////////////////////////////////////// // // Initial Permutation (AddRoundKey) // always @(posedge clk) sa33[0] <= ld ? text_in[007:000] ^ key[07:00] : 8'b0; always @(posedge clk) sa23[0] <= ld ? text_in[015:008] ^ key[15:08] : 8'b0; always @(posedge clk) sa13[0] <= ld ? text_in[023:016] ^ key[23:16] : 8'b0; always @(posedge clk) sa03[0] <= ld ? text_in[031:024] ^ key[31:24] : 8'b0; always @(posedge clk) sa32[0] <= ld ? text_in[039:032] ^ key[39:32] : 8'b0; always @(posedge clk) sa22[0] <= ld ? text_in[047:040] ^ key[47:40] : 8'b0; always @(posedge clk) sa12[0] <= ld ? text_in[055:048] ^ key[55:48] : 8'b0; always @(posedge clk) sa02[0] <= ld ? text_in[063:056] ^ key[63:56] : 8'b0; always @(posedge clk) sa31[0] <= ld ? text_in[071:064] ^ key[71:64] : 8'b0; always @(posedge clk) sa21[0] <= ld ? text_in[079:072] ^ key[79:72] : 8'b0; always @(posedge clk) sa11[0] <= ld ? text_in[087:080] ^ key[87:80] : 8'b0; always @(posedge clk) sa01[0] <= ld ? text_in[095:088] ^ key[95:88] : 8'b0; always @(posedge clk) sa30[0] <= ld ? text_in[103:096] ^ key[103:96] : 8'b0; always @(posedge clk) sa20[0] <= ld ? text_in[111:104] ^ key[111:104] : 8'b0; always @(posedge clk) sa10[0] <= ld ? text_in[119:112] ^ key[119:112] : 8'b0; always @(posedge clk) sa00[0] <= ld ? text_in[127:120] ^ key[127:120] : 8'b0; //////////////////////////////////////////////////////////////////// // // Round Permutations // genvar k; generate for(k=0; k<10; k=k+1) begin: sub_wire assign sa00_sr[k] = sa00_sub[k]; assign sa01_sr[k] = sa01_sub[k]; assign sa02_sr[k] = sa02_sub[k]; assign sa03_sr[k] = sa03_sub[k]; assign sa10_sr[k] = sa11_sub[k]; assign sa11_sr[k] = sa12_sub[k]; assign sa12_sr[k] = sa13_sub[k]; assign sa13_sr[k] = sa10_sub[k]; assign sa20_sr[k] = sa22_sub[k]; assign sa21_sr[k] = sa23_sub[k]; assign sa22_sr[k] = sa20_sub[k]; assign sa23_sr[k] = sa21_sub[k]; assign sa30_sr[k] = sa33_sub[k]; assign sa31_sr[k] = sa30_sub[k]; assign sa32_sr[k] = sa31_sub[k]; assign sa33_sr[k] = sa32_sub[k]; end for(k=0; k<9; k=k+1) begin: mc_wire assign {sa00_mc[k], sa10_mc[k], sa20_mc[k], sa30_mc[k]} = mix_col(sa00_sr[k],sa10_sr[k],sa20_sr[k],sa30_sr[k]); assign {sa01_mc[k], sa11_mc[k], sa21_mc[k], sa31_mc[k]} = mix_col(sa01_sr[k],sa11_sr[k],sa21_sr[k],sa31_sr[k]); assign {sa02_mc[k], sa12_mc[k], sa22_mc[k], sa32_mc[k]} = mix_col(sa02_sr[k],sa12_sr[k],sa22_sr[k],sa32_sr[k]); assign {sa03_mc[k], sa13_mc[k], sa23_mc[k], sa33_mc[k]} = mix_col(sa03_sr[k],sa13_sr[k],sa23_sr[k],sa33_sr[k]); assign sa00_next[k] = sa00_mc[k] ^ w0[k][31:24]; assign sa01_next[k] = sa01_mc[k] ^ w1[k][31:24]; assign sa02_next[k] = sa02_mc[k] ^ w2[k][31:24]; assign sa03_next[k] = sa03_mc[k] ^ w3[k][31:24]; assign sa10_next[k] = sa10_mc[k] ^ w0[k][23:16]; assign sa11_next[k] = sa11_mc[k] ^ w1[k][23:16]; assign sa12_next[k] = sa12_mc[k] ^ w2[k][23:16]; assign sa13_next[k] = sa13_mc[k] ^ w3[k][23:16]; assign sa20_next[k] = sa20_mc[k] ^ w0[k][15:08]; assign sa21_next[k] = sa21_mc[k] ^ w1[k][15:08]; assign sa22_next[k] = sa22_mc[k] ^ w2[k][15:08]; assign sa23_next[k] = sa23_mc[k] ^ w3[k][15:08]; assign sa30_next[k] = sa30_mc[k] ^ w0[k][07:00]; assign sa31_next[k] = sa31_mc[k] ^ w1[k][07:00]; assign sa32_next[k] = sa32_mc[k] ^ w2[k][07:00]; assign sa33_next[k] = sa33_mc[k] ^ w3[k][07:00]; end endgenerate always @(posedge clk) for(i=0; i<9; i=i+1) sa33[i+1] <= sa33_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa23[i+1] <= sa23_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa13[i+1] <= sa13_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa03[i+1] <= sa03_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa32[i+1] <= sa32_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa22[i+1] <= sa22_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa12[i+1] <= sa12_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa02[i+1] <= sa02_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa31[i+1] <= sa31_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa21[i+1] <= sa21_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa11[i+1] <= sa11_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa01[i+1] <= sa01_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa30[i+1] <= sa30_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa20[i+1] <= sa20_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa10[i+1] <= sa10_next[i]; always @(posedge clk) for(i=0; i<9; i=i+1) sa00[i+1] <= sa00_next[i]; //////////////////////////////////////////////////////////////////// // // Final text output // always @(posedge clk) text_out[127:120] <= sa00_sr[9] ^ w0[9][31:24]; always @(posedge clk) text_out[095:088] <= sa01_sr[9] ^ w1[9][31:24]; always @(posedge clk) text_out[063:056] <= sa02_sr[9] ^ w2[9][31:24]; always @(posedge clk) text_out[031:024] <= sa03_sr[9] ^ w3[9][31:24]; always @(posedge clk) text_out[119:112] <= sa10_sr[9] ^ w0[9][23:16]; always @(posedge clk) text_out[087:080] <= sa11_sr[9] ^ w1[9][23:16]; always @(posedge clk) text_out[055:048] <= sa12_sr[9] ^ w2[9][23:16]; always @(posedge clk) text_out[023:016] <= sa13_sr[9] ^ w3[9][23:16]; always @(posedge clk) text_out[111:104] <= sa20_sr[9] ^ w0[9][15:08]; always @(posedge clk) text_out[079:072] <= sa21_sr[9] ^ w1[9][15:08]; always @(posedge clk) text_out[047:040] <= sa22_sr[9] ^ w2[9][15:08]; always @(posedge clk) text_out[015:008] <= sa23_sr[9] ^ w3[9][15:08]; always @(posedge clk) text_out[103:096] <= sa30_sr[9] ^ w0[9][07:00]; always @(posedge clk) text_out[071:064] <= sa31_sr[9] ^ w1[9][07:00]; always @(posedge clk) text_out[039:032] <= sa32_sr[9] ^ w2[9][07:00]; always @(posedge clk) text_out[007:000] <= sa33_sr[9] ^ w3[9][07:00]; /*always @(posedge clk) begin $display("w0 %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x", w0[0], w0[1], w0[2], w0[3], w0[4], w0[5], w0[6], w0[7], w0[8], w0[9]); $display("w1 %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x", w1[0], w1[1], w1[2], w1[3], w1[4], w1[5], w1[6], w1[7], w1[8], w1[9]); $display("w2 %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x", w2[0], w2[1], w2[2], w2[3], w2[4], w2[5], w2[6], w2[7], w2[8], w2[9]); $display("w3 %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x", w3[0], w3[1], w3[2], w3[3], w3[4], w3[5], w3[6], w3[7], w3[8], w3[9]); end*/ //////////////////////////////////////////////////////////////////// // // Generic Functions // function [31:0] mix_col; input [7:0] s0,s1,s2,s3; reg [7:0] s0_o,s1_o,s2_o,s3_o; begin mix_col[31:24]=xtime(s0)^xtime(s1)^s1^s2^s3; mix_col[23:16]=s0^xtime(s1)^xtime(s2)^s2^s3; mix_col[15:08]=s0^s1^xtime(s2)^xtime(s3)^s3; mix_col[07:00]=xtime(s0)^s0^s1^s2^xtime(s3); end endfunction function [7:0] xtime; input [7:0] b; xtime={b[6:0],1'b0}^(8'h1b&{8{b[7]}}); endfunction //////////////////////////////////////////////////////////////////// // // Modules // aes_pipelined_key_expand_128 u0(w0[0], w0[1], w0[2], w0[3], w0[4], w0[5], w0[6], w0[7], w0[8], w0[9], w1[0], w1[1], w1[2], w1[3], w1[4], w1[5], w1[6], w1[7], w1[8], w1[9], w2[0], w2[1], w2[2], w2[3], w2[4], w2[5], w2[6], w2[7], w2[8], w2[9], w3[0], w3[1], w3[2], w3[3], w3[4], w3[5], w3[6], w3[7], w3[8], w3[9]); genvar j; generate for (j=0; j<10; j=j+1) begin: mem_block_top aes_pipelined_sbox us00( .a( sa00[j] ), .d( sa00_sub[j] )); aes_pipelined_sbox us01( .a( sa01[j] ), .d( sa01_sub[j] )); aes_pipelined_sbox us02( .a( sa02[j] ), .d( sa02_sub[j] )); aes_pipelined_sbox us03( .a( sa03[j] ), .d( sa03_sub[j] )); aes_pipelined_sbox us10( .a( sa10[j] ), .d( sa10_sub[j] )); aes_pipelined_sbox us11( .a( sa11[j] ), .d( sa11_sub[j] )); aes_pipelined_sbox us12( .a( sa12[j] ), .d( sa12_sub[j] )); aes_pipelined_sbox us13( .a( sa13[j] ), .d( sa13_sub[j] )); aes_pipelined_sbox us20( .a( sa20[j] ), .d( sa20_sub[j] )); aes_pipelined_sbox us21( .a( sa21[j] ), .d( sa21_sub[j] )); aes_pipelined_sbox us22( .a( sa22[j] ), .d( sa22_sub[j] )); aes_pipelined_sbox us23( .a( sa23[j] ), .d( sa23_sub[j] )); aes_pipelined_sbox us30( .a( sa30[j] ), .d( sa30_sub[j] )); aes_pipelined_sbox us31( .a( sa31[j] ), .d( sa31_sub[j] )); aes_pipelined_sbox us32( .a( sa32[j] ), .d( sa32_sub[j] )); aes_pipelined_sbox us33( .a( sa33[j] ), .d( sa33_sub[j] )); end endgenerate endmodule 1.1 cryptosorter/memocodeDesignContest2008/aesCorePipelined/aes_pipelined_key_expand_128.v http://www.opencores.org/cvsweb.shtml/cryptosorter/memocodeDesignContest2008/aesCorePipelined/aes_pipelined_key_expand_128.v?rev=1.1&content-type=text/x-cvsweb-markup Index: aes_pipelined_key_expand_128.v =================================================================== module aes_pipelined_key_expand_128(wo_0_0, wo_0_1, wo_0_2, wo_0_3, wo_0_4, wo_0_5, wo_0_6, wo_0_7, wo_0_8, wo_0_9, wo_1_0, wo_1_1, wo_1_2, wo_1_3, wo_1_4, wo_1_5, wo_1_6, wo_1_7, wo_1_8, wo_1_9, wo_2_0, wo_2_1, wo_2_2, wo_2_3, wo_2_4, wo_2_5, wo_2_6, wo_2_7, wo_2_8, wo_2_9, wo_3_0, wo_3_1, wo_3_2, wo_3_3, wo_3_4, wo_3_5, wo_3_6, wo_3_7, wo_3_8, wo_3_9); output [31:0] wo_0_0, wo_0_1, wo_0_2, wo_0_3, wo_0_4, wo_0_5, wo_0_6, wo_0_7, wo_0_8, wo_0_9, wo_1_0, wo_1_1, wo_1_2, wo_1_3, wo_1_4, wo_1_5, wo_1_6, wo_1_7, wo_1_8, wo_1_9, wo_2_0, wo_2_1, wo_2_2, wo_2_3, wo_2_4, wo_2_5, wo_2_6, wo_2_7, wo_2_8, wo_2_9, wo_3_0, wo_3_1, wo_3_2, wo_3_3, wo_3_4, wo_3_5, wo_3_6, wo_3_7, wo_3_8, wo_3_9; assign wo_0_0 = 32'ha7d3ab65; assign wo_0_1 = 32'h4a805c1c; assign wo_0_2 = 32'h47c73534; assign wo_0_3 = 32'h9b1c7104; assign wo_0_4 = 32'hbdde78b1; assign wo_0_5 = 32'h9715a416; assign wo_0_6 = 32'hea61be0a; assign wo_0_7 = 32'h56f60697; assign wo_0_8 = 32'h203cc708; assign wo_0_9 = 32'hef7a391e; assign wo_1_0 = 32'haa3fa688; assign wo_1_1 = 32'he0bffa94; assign wo_1_2 = 32'ha778cfa0; assign wo_1_3 = 32'h3c64bea4; assign wo_1_4 = 32'h81bac615; assign wo_1_5 = 32'h16af6203; assign wo_1_6 = 32'hfccedc09; assign wo_1_7 = 32'haa38da9e; assign wo_1_8 = 32'h8a041d96; assign wo_1_9 = 32'h657e2488; assign wo_2_0 = 32'ha19ebc56; assign wo_2_1 = 32'h412146c2; assign wo_2_2 = 32'he6598962; assign wo_2_3 = 32'hda3d37c6; assign wo_2_4 = 32'h5b87f1d3; assign wo_2_5 = 32'h4d2893d0; assign wo_2_6 = 32'hb1e64fd9; assign wo_2_7 = 32'h1bde9547; assign wo_2_8 = 32'h91da88d1; assign wo_2_9 = 32'hf4a4ac59; assign wo_3_0 = 32'haf615026; assign wo_3_1 = 32'hee4016e4; assign wo_3_2 = 32'h08199f86; assign wo_3_3 = 32'hd224a840; assign wo_3_4 = 32'h89a35993; assign wo_3_5 = 32'hc48bca43; assign wo_3_6 = 32'h756d859a; assign wo_3_7 = 32'h6eb310dd; assign wo_3_8 = 32'hff69980c; assign wo_3_9 = 32'h0bcd3455; endmodule 1.1 cryptosorter/memocodeDesignContest2008/aesCorePipelined/aes_pipelined_sbox.v http://www.opencores.org/cvsweb.shtml/cryptosorter/memocodeDesignContest2008/aesCorePipelined/aes_pipelined_sbox.v?rev=1.1&content-type=text/x-cvsweb-markup Index: aes_pipelined_sbox.v =================================================================== module aes_pipelined_sbox(a,d); input [7:0] a; output [7:0] d; reg [7:0] d; always @(a) case(a) // synopsys full_case parallel_case 8'h00: d=8'h63; 8'h01: d=8'h7c; 8'h02: d=8'h77; 8'h03: d=8'h7b; 8'h04: d=8'hf2; 8'h05: d=8'h6b; 8'h06: d=8'h6f; 8'h07: d=8'hc5; 8'h08: d=8'h30; 8'h09: d=8'h01; 8'h0a: d=8'h67; 8'h0b: d=8'h2b; 8'h0c: d=8'hfe; 8'h0d: d=8'hd7; 8'h0e: d=8'hab; 8'h0f: d=8'h76; 8'h10: d=8'hca; 8'h11: d=8'h82; 8'h12: d=8'hc9; 8'h13: d=8'h7d; 8'h14: d=8'hfa; 8'h15: d=8'h59; 8'h16: d=8'h47; 8'h17: d=8'hf0; 8'h18: d=8'had; 8'h19: d=8'hd4; 8'h1a: d=8'ha2; 8'h1b: d=8'haf; 8'h1c: d=8'h9c; 8'h1d: d=8'ha4; 8'h1e: d=8'h72; 8'h1f: d=8'hc0; 8'h20: d=8'hb7; 8'h21: d=8'hfd; 8'h22: d=8'h93; 8'h23: d=8'h26; 8'h24: d=8'h36; 8'h25: d=8'h3f; 8'h26: d=8'hf7; 8'h27: d=8'hcc; 8'h28: d=8'h34; 8'h29: d=8'ha5; 8'h2a: d=8'he5; 8'h2b: d=8'hf1; 8'h2c: d=8'h71; 8'h2d: d=8'hd8; 8'h2e: d=8'h31; 8'h2f: d=8'h15; 8'h30: d=8'h04; 8'h31: d=8'hc7; 8'h32: d=8'h23; 8'h33: d=8'hc3; 8'h34: d=8'h18; 8'h35: d=8'h96; 8'h36: d=8'h05; 8'h37: d=8'h9a; 8'h38: d=8'h07; 8'h39: d=8'h12; 8'h3a: d=8'h80; 8'h3b: d=8'he2; 8'h3c: d=8'heb; 8'h3d: d=8'h27; 8'h3e: d=8'hb2; 8'h3f: d=8'h75; 8'h40: d=8'h09; 8'h41: d=8'h83; 8'h42: d=8'h2c; 8'h43: d=8'h1a; 8'h44: d=8'h1b; 8'h45: d=8'h6e; 8'h46: d=8'h5a; 8'h47: d=8'ha0; 8'h48: d=8'h52; 8'h49: d=8'h3b; 8'h4a: d=8'hd6; 8'h4b: d=8'hb3; 8'h4c: d=8'h29; 8'h4d: d=8'he3; 8'h4e: d=8'h2f; 8'h4f: d=8'h84; 8'h50: d=8'h53; 8'h51: d=8'hd1; 8'h52: d=8'h00; 8'h53: d=8'hed; 8'h54: d=8'h20; 8'h55: d=8'hfc; 8'h56: d=8'hb1; 8'h57: d=8'h5b; 8'h58: d=8'h6a; 8'h59: d=8'hcb; 8'h5a: d=8'hbe; 8'h5b: d=8'h39; 8'h5c: d=8'h4a; 8'h5d: d=8'h4c; 8'h5e: d=8'h58; 8'h5f: d=8'hcf; 8'h60: d=8'hd0; 8'h61: d=8'hef; 8'h62: d=8'haa; 8'h63: d=8'hfb; 8'h64: d=8'h43; 8'h65: d=8'h4d; 8'h66: d=8'h33; 8'h67: d=8'h85; 8'h68: d=8'h45; 8'h69: d=8'hf9; 8'h6a: d=8'h02; 8'h6b: d=8'h7f; 8'h6c: d=8'h50; 8'h6d: d=8'h3c; 8'h6e: d=8'h9f; 8'h6f: d=8'ha8; 8'h70: d=8'h51; 8'h71: d=8'ha3; 8'h72: d=8'h40; 8'h73: d=8'h8f; 8'h74: d=8'h92; 8'h75: d=8'h9d; 8'h76: d=8'h38; 8'h77: d=8'hf5; 8'h78: d=8'hbc; 8'h79: d=8'hb6; 8'h7a: d=8'hda; 8'h7b: d=8'h21; 8'h7c: d=8'h10; 8'h7d: d=8'hff; 8'h7e: d=8'hf3; 8'h7f: d=8'hd2; 8'h80: d=8'hcd; 8'h81: d=8'h0c; 8'h82: d=8'h13; 8'h83: d=8'hec; 8'h84: d=8'h5f; 8'h85: d=8'h97; 8'h86: d=8'h44; 8'h87: d=8'h17; 8'h88: d=8'hc4; 8'h89: d=8'ha7; 8'h8a: d=8'h7e; 8'h8b: d=8'h3d; 8'h8c: d=8'h64; 8'h8d: d=8'h5d; 8'h8e: d=8'h19; 8'h8f: d=8'h73; 8'h90: d=8'h60; 8'h91: d=8'h81; 8'h92: d=8'h4f; 8'h93: d=8'hdc; 8'h94: d=8'h22; 8'h95: d=8'h2a; 8'h96: d=8'h90; 8'h97: d=8'h88; 8'h98: d=8'h46; 8'h99: d=8'hee; 8'h9a: d=8'hb8; 8'h9b: d=8'h14; 8'h9c: d=8'hde; 8'h9d: d=8'h5e; 8'h9e: d=8'h0b; 8'h9f: d=8'hdb; 8'ha0: d=8'he0; 8'ha1: d=8'h32; 8'ha2: d=8'h3a; 8'ha3: d=8'h0a; 8'ha4: d=8'h49; 8'ha5: d=8'h06; 8'ha6: d=8'h24; 8'ha7: d=8'h5c; 8'ha8: d=8'hc2; 8'ha9: d=8'hd3; 8'haa: d=8'hac; 8'hab: d=8'h62; 8'hac: d=8'h91; 8'had: d=8'h95; 8'hae: d=8'he4; 8'haf: d=8'h79; 8'hb0: d=8'he7; 8'hb1: d=8'hc8; 8'hb2: d=8'h37; 8'hb3: d=8'h6d; 8'hb4: d=8'h8d; 8'hb5: d=8'hd5; 8'hb6: d=8'h4e; 8'hb7: d=8'ha9; 8'hb8: d=8'h6c; 8'hb9: d=8'h56; 8'hba: d=8'hf4; 8'hbb: d=8'hea; 8'hbc: d=8'h65; 8'hbd: d=8'h7a; 8'hbe: d=8'hae; 8'hbf: d=8'h08; 8'hc0: d=8'hba; 8'hc1: d=8'h78; 8'hc2: d=8'h25; 8'hc3: d=8'h2e; 8'hc4: d=8'h1c; 8'hc5: d=8'ha6; 8'hc6: d=8'hb4; 8'hc7: d=8'hc6; 8'hc8: d=8'he8; 8'hc9: d=8'hdd; 8'hca: d=8'h74; 8'hcb: d=8'h1f; 8'hcc: d=8'h4b; 8'hcd: d=8'hbd; 8'hce: d=8'h8b; 8'hcf: d=8'h8a; 8'hd0: d=8'h70; 8'hd1: d=8'h3e; 8'hd2: d=8'hb5; 8'hd3: d=8'h66; 8'hd4: d=8'h48; 8'hd5: d=8'h03; 8'hd6: d=8'hf6; 8'hd7: d=8'h0e; 8'hd8: d=8'h61; 8'hd9: d=8'h35; 8'hda: d=8'h57; 8'hdb: d=8'hb9; 8'hdc: d=8'h86; 8'hdd: d=8'hc1; 8'hde: d=8'h1d; 8'hdf: d=8'h9e; 8'he0: d=8'he1; 8'he1: d=8'hf8; 8'he2: d=8'h98; 8'he3: d=8'h11; 8'he4: d=8'h69; 8'he5: d=8'hd9; 8'he6: d=8'h8e; 8'he7: d=8'h94; 8'he8: d=8'h9b; 8'he9: d=8'h1e; 8'hea: d=8'h87; 8'heb: d=8'he9; 8'hec: d=8'hce; 8'hed: d=8'h55; 8'hee: d=8'h28; 8'hef: d=8'hdf; 8'hf0: d=8'h8c; 8'hf1: d=8'ha1; 8'hf2: d=8'h89; 8'hf3: d=8'h0d; 8'hf4: d=8'hbf; 8'hf5: d=8'he6; 8'hf6: d=8'h42; 8'hf7: d=8'h68; 8'hf8: d=8'h41; 8'hf9: d=8'h99; 8'hfa: d=8'h2d; 8'hfb: d=8'h0f; 8'hfc: d=8'hb0; 8'hfd: d=8'h54; 8'hfe: d=8'hbb; 8'hff: d=8'h16; endcase endmodule

     
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