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Message
From: cvs at opencores.org<cvs@o...>
Date: Mon Mar 24 20:40:27 CET 2008
Subject: [cvs-checkins] MODIFIED: spi_slave ...
Date: 00/08/03 24:20:40 Added: spi_slave/sim/rtl_sim/modelsim_sim/run/crc_core
crc_core_tb_c.do crc_core_tb_s.do crc_core_tb_w.do
Log:
Initial Release
Revision Changes Path
1.1 spi_slave/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_c.do
http://www.opencores.org/cvsweb.shtml/spi_slave/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_c.do?rev=1.1&content-type=text/x-cvsweb-markup
Index: crc_core_tb_c.do
===================================================================
vlib work
# packages
vcom -93 ../../../../../bench/vhdl/images-body.vhd
vcom -93 ../../../../../bench/vhdl/txt_util.vhd
# DUT
vcom -93 ../../../../../rtl/vhdl/PCK_CRC8_D8.vhd
vcom -93 ../../../../../rtl/vhdl/PCK_CRC32_D32.vhd
vcom -93 ../../../../../rtl/vhdl/crc_gen.vhd
vcom -93 ../../../../../rtl/vhdl/crc_core.vhd
# Testbench
vcom -93 ../../../../../bench/vhdl/crc_core_tb.vhd
1.1 spi_slave/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_s.do
http://www.opencores.org/cvsweb.shtml/spi_slave/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_s.do?rev=1.1&content-type=text/x-cvsweb-markup
Index: crc_core_tb_s.do
===================================================================
vsim -t ps crc_core_tb
view wave
do crc_core_tb_w.do
run -all
1.1 spi_slave/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_w.do
http://www.opencores.org/cvsweb.shtml/spi_slave/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_w.do?rev=1.1&content-type=text/x-cvsweb-markup
Index: crc_core_tb_w.do
===================================================================
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -format Logic /crc_core_tb/rst
add wave -noupdate -format Logic /crc_core_tb/opb_clk
add wave -noupdate -format Logic /crc_core_tb/crc_clr
add wave -noupdate -format Logic /crc_core_tb/opb_m_last_block
add wave -noupdate -divider RX
add wave -noupdate -format Logic /crc_core_tb/fifo_rx_en
add wave -noupdate -format Literal /crc_core_tb/fifo_rx_data
add wave -noupdate -format Literal /crc_core_tb/opb_rx_crc_value
add wave -noupdate -divider TX
add wave -noupdate -format Logic /crc_core_tb/fifo_tx_en
add wave -noupdate -format Literal /crc_core_tb/fifo_tx_data
add wave -noupdate -format Logic /crc_core_tb/tx_crc_insert
add wave -noupdate -format Literal /crc_core_tb/opb_tx_crc_value
add wave -noupdate -divider Internal
add wave -noupdate -format Literal /crc_core_tb/dut/state
add wave -noupdate -format Logic /crc_core_tb/dut/rx_crc_en
add wave -noupdate -format Logic /crc_core_tb/dut/tx_crc_en
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {493567 ps} 0}
configure wave -namecolwidth 211
configure wave -valuecolwidth 169
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
update
WaveRestoreZoom {0 ps} {582750 ps}
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