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From: cvs at opencores.org<cvs@o...>
Date: Mon Dec 17 13:53:44 CET 2007
Subject: [cvs-checkins] MODIFIED: aemb ...
Date: 00/07/12 17:13:53

Modified: aemb/rtl/verilog aeMB2_bpcu.v
Log:
Made idle thread PC track main PC.


Revision Changes Path
1.4 aemb/rtl/verilog/aeMB2_bpcu.v

http://www.opencores.org/cvsweb.shtml/aemb/rtl/verilog/aeMB2_bpcu.v.diff?r1=1.3&r2=1.4

(In the diff below, changes in quantity of whitespace are not shown.)

Index: aeMB2_bpcu.v
===================================================================
RCS file: /cvsroot/sybreon/aemb/rtl/verilog/aeMB2_bpcu.v,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -b -r1.3 -r1.4
--- aeMB2_bpcu.v 13 Dec 2007 20:12:11 -0000 1.3
+++ aeMB2_bpcu.v 17 Dec 2007 12:53:43 -0000 1.4
@@ -1,4 +1,4 @@
-/* $Id: aeMB2_bpcu.v,v 1.3 2007/12/13 20:12:11 sybreon Exp $
+/* $Id: aeMB2_bpcu.v,v 1.4 2007/12/17 12:53:43 sybreon Exp $
**
** AEMB2 BRANCH/PROGRAMME COUNTER
**
@@ -103,7 +103,7 @@
rPC0, rPC1,// register based
rPCL[0:1]; // LUT based

- wire [31:2] wPCNXT = (pha_i) ? rPC0 : rPC1;
+ wire [31:2] wPCNXT = (pha_i | !TXE) ? rPC0 : rPC1;
wire [31:2] wPCINC = (rPC + 1);

/* Check for RW data hazard */
@@ -243,6 +243,9 @@
endmodule // aeMB2_bpcu

/* $Log: aeMB2_bpcu.v,v $
+/* Revision 1.4 2007/12/17 12:53:43 sybreon
+/* Made idle thread PC track main PC.
+/*
/* Revision 1.3 2007/12/13 20:12:11 sybreon
/* Code cleanup + minor speed regression.
/*