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Message
From: cvs at opencores.org<cvs@o...>
Date: Fri Nov 30 18:08:30 CET 2007
Subject: [cvs-checkins] MODIFIED: aemb ...
Date: 00/07/11 30:18:08 Modified: aemb/sim cversim iversim
Log:
Moved simulation kernel into code.
Revision Changes Path
1.4 aemb/sim/cversim
http://www.opencores.org/cvsweb.shtml/aemb/sim/cversim.diff?r1=1.3&r2=1.4
(In the diff below, changes in quantity of whitespace are not shown.)
Index: cversim
===================================================================
RCS file: /cvsroot/sybreon/aemb/sim/cversim,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -b -r1.3 -r1.4
--- cversim 5 Nov 2007 10:59:31 -0000 1.3
+++ cversim 30 Nov 2007 17:08:30 -0000 1.4
@@ -1,6 +1,9 @@
#!/bin/sh
-# $Id: cversim,v 1.3 2007/11/05 10:59:31 sybreon Exp $
+# $Id: cversim,v 1.4 2007/11/30 17:08:30 sybreon Exp $
# $Log: cversim,v $
+# Revision 1.4 2007/11/30 17:08:30 sybreon
+# Moved simulation kernel into code.
+#
# Revision 1.3 2007/11/05 10:59:31 sybreon
# Added random seed for simulation.
#
@@ -13,4 +16,4 @@
#
RANDOM=$(date +%s)
echo "parameter randseed = $RANDOM;" > random.v
-cver -q -w $@ ../rtl/verilog/*.v
+cver -q -w +define+AEMB_SIMULATION_KERNEL $@ ../rtl/verilog/*.v
1.4 aemb/sim/iversim
http://www.opencores.org/cvsweb.shtml/aemb/sim/iversim.diff?r1=1.3&r2=1.4
(In the diff below, changes in quantity of whitespace are not shown.)
Index: iversim
===================================================================
RCS file: /cvsroot/sybreon/aemb/sim/iversim,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -b -r1.3 -r1.4
--- iversim 9 Nov 2007 20:50:51 -0000 1.3
+++ iversim 30 Nov 2007 17:08:30 -0000 1.4
@@ -1,6 +1,9 @@
#!/bin/sh
-# $Id: iversim,v 1.3 2007/11/09 20:50:51 sybreon Exp $
+# $Id: iversim,v 1.4 2007/11/30 17:08:30 sybreon Exp $
# $Log: iversim,v $
+# Revision 1.4 2007/11/30 17:08:30 sybreon
+# Moved simulation kernel into code.
+#
# Revision 1.3 2007/11/09 20:50:51 sybreon
# Added log output to iverilog.log
#
@@ -12,4 +15,4 @@
#
RANDOM=$(date +%s)
echo "parameter randseed = $RANDOM;" > random.v
-iverilog $@ ../rtl/verilog/*.v && vvp -l iverilog.log a.out && rm a.out
+iverilog $@ -DAEMB_SIMULATION_KERNEL ../rtl/verilog/*.v && vvp -l iverilog.log a.out && rm a.out
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