OPENCORES.ORG

From: cvs at opencores.org<cvs@o...>
Date: Thu Nov 29 04:50:40 CET 2007
Subject: [cvs-checkins] MODIFIED: mips789 ...

Date: 00/07/11 29:04:50

Modified: mips789/synplify_prj/rev_1 mips_top.vqm Log: no message Revision Changes Path 1.2 mips789/synplify_prj/rev_1/mips_top.vqm http://www.opencores.org/cvsweb.shtml/mips789/synplify_prj/rev_1/mips_top.vqm.diff?r1=1.1&r2=1.2 (In the diff below, changes in quantity of whitespace are not shown.) Index: mips_top.vqm =================================================================== RCS file: /cvsroot/mcupro/mips789/synplify_prj/rev_1/mips_top.vqm,v retrieving revision 1.1 retrieving revision 1.2 diff -u -b -r1.1 -r1.2 --- mips_top.vqm 26 Nov 2007 13:50:16 -0000 1.1 +++ mips_top.vqm 29 Nov 2007 03:50:37 -0000 1.2 @@ -1,7 +1,7 @@ // // Written by Synplify // Synplify 8.1.0, Build 539R. -// Tue Nov 25 18:53:58 2008 +// Sat Nov 29 00:48:01 2008 // // Source file index table: // Object locations will have the form <file>:<line> @@ -10,28 +10,28 @@ // file 2 "\c:\program files\synplicity\fpga_81\lib\altera\cyclone.v " // file 3 "\c:\program files\synplicity\fpga_81\lib\altera\altera_mf.v " // file 4 "\c:\program files\synplicity\fpga_81\lib\altera\altera_lpm.v " -// file 5 "\f:\mips789\rtl\verilog\exec_stage.v " -// file 6 "\f:\mips789\rtl\verilog\mips789_defs.v " -// file 7 "\f:\mips789\rtl\verilog\rf_components.v " -// file 8 "\f:\mips789\rtl\verilog\rf_stage.v " -// file 9 "\f:\mips789\rtl\verilog\ctl_fsm.v " -// file 10 "\f:\mips789\rtl\verilog\decode_pipe.v " -// file 11 "\f:\mips789\rtl\verilog\dvc.v " -// file 12 "\f:\mips789\rtl\verilog\forward.v " -// file 13 "\f:\mips789\rtl\verilog\mem_module.v " -// file 14 "\f:\mips789\rtl\verilog\mips_core.v " -// file 15 "\f:\mips789\rtl\verilog\mips_dvc.v " -// file 16 "\f:\mips789\rtl\verilog\mips_sys.v " -// file 17 "\f:\mips789\rtl\verilog\mips_uart.v " -// file 18 "\f:\mips789\rtl\verilog\ulit.v " -// file 19 "\f:\mips789\rtl\verilog\altera\fifo512_cyclone.v " -// file 20 "\f:\mips789\rtl\verilog\mips_top.v " -// file 21 "\f:\mips789\rtl\verilog\ram_module.v " -// file 22 "\f:\mips789\rtl\verilog\altera\pll50.v " -// file 23 "\f:\mips789\rtl\verilog\altera\ram2048x8_0.v " -// file 24 "\f:\mips789\rtl\verilog\altera\ram2048x8_1.v " -// file 25 "\f:\mips789\rtl\verilog\altera\ram2048x8_2.v " -// file 26 "\f:\mips789\rtl\verilog\altera\ram2048x8_3.v " +// file 5 "\f:\mips_bak\11_28_update\rtl\verilog\exec_stage.v " +// file 6 "\f:\mips_bak\11_28_update\rtl\verilog\mips789_defs.v " +// file 7 "\f:\mips_bak\11_28_update\rtl\verilog\rf_components.v " +// file 8 "\f:\mips_bak\11_28_update\rtl\verilog\rf_stage.v " +// file 9 "\f:\mips_bak\11_28_update\rtl\verilog\ctl_fsm.v " +// file 10 "\f:\mips_bak\11_28_update\rtl\verilog\decode_pipe.v " +// file 11 "\f:\mips_bak\11_28_update\rtl\verilog\dvc.v " +// file 12 "\f:\mips_bak\11_28_update\rtl\verilog\forward.v " +// file 13 "\f:\mips_bak\11_28_update\rtl\verilog\mem_module.v " +// file 14 "\f:\mips_bak\11_28_update\rtl\verilog\mips_core.v " +// file 15 "\f:\mips_bak\11_28_update\rtl\verilog\mips_dvc.v " +// file 16 "\f:\mips_bak\11_28_update\rtl\verilog\mips_sys.v " +// file 17 "\f:\mips_bak\11_28_update\rtl\verilog\mips_uart.v " +// file 18 "\f:\mips_bak\11_28_update\rtl\verilog\ulit.v " +// file 19 "\f:\mips_bak\11_28_update\rtl\verilog\altera\fifo512_cyclone.v " +// file 20 "\f:\mips_bak\11_28_update\rtl\verilog\mips_top.v " +// file 21 "\f:\mips_bak\11_28_update\rtl\verilog\ram_module.v " +// file 22 "\f:\mips_bak\11_28_update\rtl\verilog\altera\pll50.v " +// file 23 "\f:\mips_bak\11_28_update\rtl\verilog\altera\ram2048x8_0.v " +// file 24 "\f:\mips_bak\11_28_update\rtl\verilog\altera\ram2048x8_1.v " +// file 25 "\f:\mips_bak\11_28_update\rtl\verilog\altera\ram2048x8_2.v " +// file 26 "\f:\mips_bak\11_28_update\rtl\verilog\altera\ram2048x8_3.v " // VQM4.1+ module altpll_Z1 ( @@ -202,17 +202,17 @@ c_2, c_1, c_0, - pc_next_iv_i_a2_2, - pc_next_iv_i_a2_1, - pc_next_iv_i_a2_0, - pc_next_iv_0_0, + pc_next_iv_9, + pc_next_iv_8, pc_next_iv_7, pc_next_iv_6, pc_next_iv_5, pc_next_iv_4, pc_next_iv_3, + pc_next_iv_2, pc_next_iv_1, - pc_next_iv_0_d0, + pc_next_iv_0, + pc_next_iv_0_0, dout_1_2_7, dout_1_2_6, dout_1_2_5, @@ -251,17 +251,17 @@ input c_2 ; input c_1 ; input c_0 ; -input pc_next_iv_i_a2_2 ; -input pc_next_iv_i_a2_1 ; -input pc_next_iv_i_a2_0 ; -input pc_next_iv_0_0 ; +input pc_next_iv_9 ; +input pc_next_iv_8 ; input pc_next_iv_7 ; input pc_next_iv_6 ; input pc_next_iv_5 ; input pc_next_iv_4 ; input pc_next_iv_3 ; +input pc_next_iv_2 ; input pc_next_iv_1 ; -input pc_next_iv_0_d0 ; +input pc_next_iv_0 ; +input pc_next_iv_0_0 ; input dout_1_2_7 ; input dout_1_2_6 ; input dout_1_2_5 ; @@ -299,17 +299,17 @@ wire c_2 ; wire c_1 ; wire c_0 ; -wire pc_next_iv_i_a2_2 ; -wire pc_next_iv_i_a2_1 ; -wire pc_next_iv_i_a2_0 ; -wire pc_next_iv_0_0 ; +wire pc_next_iv_9 ; +wire pc_next_iv_8 ; wire pc_next_iv_7 ; wire pc_next_iv_6 ; wire pc_next_iv_5 ; wire pc_next_iv_4 ; wire pc_next_iv_3 ; +wire pc_next_iv_2 ; wire pc_next_iv_1 ; -wire pc_next_iv_0_d0 ; +wire pc_next_iv_0 ; +wire pc_next_iv_0_0 ; wire dout_1_2_7 ; wire dout_1_2_6 ; wire dout_1_2_5 ; @@ -342,9 +342,9 @@ .data_a({GND, GND, GND, GND, GND, GND, GND, GND}), .data_b({dout_1_2_7, dout_1_2_6, dout_1_2_5, dout_1_2_4, dout_1_2_3, dout_1_2_2, dout_1_2_1, dout_1_2_0}), - .address_a({pc_next_iv_i_a2_2, pc_next_iv_i_a2_1, pc_next_iv_i_a2_0, pc_next_iv_7, - pc_next_iv_6, pc_next_iv_5, pc_next_iv_4, pc_next_iv_3, pc_next_iv_0_0, - pc_next_iv_1, pc_next_iv_0_d0}), + .address_a({pc_next_iv_9, pc_next_iv_8, pc_next_iv_7, pc_next_iv_6, pc_next_iv_5, + pc_next_iv_4, pc_next_iv_3, pc_next_iv_2, pc_next_iv_1, pc_next_iv_0, + pc_next_iv_0_0}), .address_b({c_10, c_9, c_8, c_7, c_6, c_5, c_4, c_3, c_2, c_1, c_0}), .clock0(CLK), .q_a({ins2core_7, ins2core_6, ins2core_5, ins2core_4, ins2core_3, ins2core_2, @@ -442,17 +442,17 @@ c_2, c_1, c_0, - pc_next_iv_i_a2_2, - pc_next_iv_i_a2_1, - pc_next_iv_i_a2_0, - pc_next_iv_0_0, + pc_next_iv_9, + pc_next_iv_8, pc_next_iv_7, pc_next_iv_6, pc_next_iv_5, pc_next_iv_4, pc_next_iv_3, + pc_next_iv_2, pc_next_iv_1, - pc_next_iv_0_d0, + pc_next_iv_0, + pc_next_iv_0_0, dout_1_7, dout_1_6, dout_1_5, @@ -491,17 +491,17 @@ input c_2 ; input c_1 ; input c_0 ; -input pc_next_iv_i_a2_2 ; -input pc_next_iv_i_a2_1 ; -input pc_next_iv_i_a2_0 ; -input pc_next_iv_0_0 ; +input pc_next_iv_9 ; +input pc_next_iv_8 ; input pc_next_iv_7 ; input pc_next_iv_6 ; input pc_next_iv_5 ; input pc_next_iv_4 ; input pc_next_iv_3 ; +input pc_next_iv_2 ; input pc_next_iv_1 ; -input pc_next_iv_0_d0 ; +input pc_next_iv_0 ; +input pc_next_iv_0_0 ; input dout_1_7 ; input dout_1_6 ; input dout_1_5 ; @@ -539,17 +539,17 @@ wire c_2 ; wire c_1 ; wire c_0 ; -wire pc_next_iv_i_a2_2 ; -wire pc_next_iv_i_a2_1 ; -wire pc_next_iv_i_a2_0 ; -wire pc_next_iv_0_0 ; +wire pc_next_iv_9 ; +wire pc_next_iv_8 ; wire pc_next_iv_7 ; wire pc_next_iv_6 ; wire pc_next_iv_5 ; wire pc_next_iv_4 ; wire pc_next_iv_3 ; +wire pc_next_iv_2 ; wire pc_next_iv_1 ; -wire pc_next_iv_0_d0 ; +wire pc_next_iv_0 ; +wire pc_next_iv_0_0 ; wire dout_1_7 ; wire dout_1_6 ; wire dout_1_5 ; @@ -582,9 +582,9 @@ .data_a({GND, GND, GND, GND, GND, GND, GND, GND}), .data_b({dout_1_7, dout_1_6, dout_1_5, dout_1_4, dout_1_3, dout_1_2, dout_1_1, dout_1_0}), - .address_a({pc_next_iv_i_a2_2, pc_next_iv_i_a2_1, pc_next_iv_i_a2_0, pc_next_iv_7, - pc_next_iv_6, pc_next_iv_5, pc_next_iv_4, pc_next_iv_3, pc_next_iv_0_0, - pc_next_iv_1, pc_next_iv_0_d0}), + .address_a({pc_next_iv_9, pc_next_iv_8, pc_next_iv_7, pc_next_iv_6, pc_next_iv_5, + pc_next_iv_4, pc_next_iv_3, pc_next_iv_2, pc_next_iv_1, pc_next_iv_0, + pc_next_iv_0_0}), .address_b({c_10, c_9, c_8, c_7, c_6, c_5, c_4, c_3, c_2, c_1, c_0}), .clock0(CLK), .q_a({ins2core_7, ins2core_6, ins2core_5, ins2core_4, ins2core_3, ins2core_2, @@ -682,25 +682,25 @@ c_2, c_1, c_0, - pc_next_iv_i_a2_2, - pc_next_iv_i_a2_1, - pc_next_iv_i_a2_0, - pc_next_iv_0_0, + pc_next_iv_9, + pc_next_iv_8, pc_next_iv_7, pc_next_iv_6, pc_next_iv_5, pc_next_iv_4, pc_next_iv_3, + pc_next_iv_2, pc_next_iv_1, - pc_next_iv_0_d0, - dout_1_x_7, - dout_1_x_6, - dout_1_x_5, - dout_1_x_4, - dout_1_x_3, - dout_1_x_2, - dout_1_x_1, - dout_1_x_0, + pc_next_iv_0, + pc_next_iv_0_0, + dout_1_7, + dout_1_6, + dout_1_5, + dout_1_4, + dout_1_3, + dout_1_2, + dout_1_1, + dout_1_0, wr_en_0_0_0, CLK ); @@ -731,25 +731,25 @@ input c_2 ; input c_1 ; input c_0 ; -input pc_next_iv_i_a2_2 ; -input pc_next_iv_i_a2_1 ; -input pc_next_iv_i_a2_0 ; -input pc_next_iv_0_0 ; +input pc_next_iv_9 ; +input pc_next_iv_8 ; input pc_next_iv_7 ; input pc_next_iv_6 ; input pc_next_iv_5 ; input pc_next_iv_4 ; input pc_next_iv_3 ; +input pc_next_iv_2 ; input pc_next_iv_1 ; -input pc_next_iv_0_d0 ; -input dout_1_x_7 ; -input dout_1_x_6 ; -input dout_1_x_5 ; -input dout_1_x_4 ; -input dout_1_x_3 ; -input dout_1_x_2 ; -input dout_1_x_1 ; -input dout_1_x_0 ; +input pc_next_iv_0 ; +input pc_next_iv_0_0 ; +input dout_1_7 ; +input dout_1_6 ; +input dout_1_5 ; +input dout_1_4 ; +input dout_1_3 ; +input dout_1_2 ; +input dout_1_1 ; +input dout_1_0 ; input wr_en_0_0_0 ; input CLK ; wire data2core_7 ; @@ -779,25 +779,25 @@ wire c_2 ; wire c_1 ; wire c_0 ; -wire pc_next_iv_i_a2_2 ; -wire pc_next_iv_i_a2_1 ; -wire pc_next_iv_i_a2_0 ; -wire pc_next_iv_0_0 ; +wire pc_next_iv_9 ; +wire pc_next_iv_8 ; wire pc_next_iv_7 ; wire pc_next_iv_6 ; wire pc_next_iv_5 ; wire pc_next_iv_4 ; wire pc_next_iv_3 ; +wire pc_next_iv_2 ; wire pc_next_iv_1 ; -wire pc_next_iv_0_d0 ; -wire dout_1_x_7 ; -wire dout_1_x_6 ; -wire dout_1_x_5 ; -wire dout_1_x_4 ; -wire dout_1_x_3 ; -wire dout_1_x_2 ; -wire dout_1_x_1 ; -wire dout_1_x_0 ; +wire pc_next_iv_0 ; +wire pc_next_iv_0_0 ; +wire dout_1_7 ; +wire dout_1_6 ; +wire dout_1_5 ; +wire dout_1_4 ; +wire dout_1_3 ; +wire dout_1_2 ; +wire dout_1_1 ; +wire dout_1_0 ; wire wr_en_0_0_0 ; wire CLK ; wire GND ; @@ -820,11 +820,11 @@ .wren_a(GND), .wren_b(wr_en_0_0_0), .data_a({GND, GND, GND, GND, GND, GND, GND, GND}), - .data_b({dout_1_x_7, dout_1_x_6, dout_1_x_5, dout_1_x_4, dout_1_x_3, dout_1_x_2, - dout_1_x_1, dout_1_x_0}), - .address_a({pc_next_iv_i_a2_2, pc_next_iv_i_a2_1, pc_next_iv_i_a2_0, pc_next_iv_7, - pc_next_iv_6, pc_next_iv_5, pc_next_iv_4, pc_next_iv_3, pc_next_iv_0_0, - pc_next_iv_1, pc_next_iv_0_d0}), + .data_b({dout_1_7, dout_1_6, dout_1_5, dout_1_4, dout_1_3, dout_1_2, dout_1_1, + dout_1_0}), + .address_a({pc_next_iv_9, pc_next_iv_8, pc_next_iv_7, pc_next_iv_6, pc_next_iv_5, + pc_next_iv_4, pc_next_iv_3, pc_next_iv_2, pc_next_iv_1, pc_next_iv_0, + pc_next_iv_0_0}), .address_b({c_10, c_9, c_8, c_7, c_6, c_5, c_4, c_3, c_2, c_1, c_0}), .clock0(CLK), .q_a({ins2core_7, ins2core_6, ins2core_5, ins2core_4, ins2core_3, ins2core_2, @@ -922,17 +922,17 @@ c_2, c_1, c_0, - pc_next_iv_i_a2_2, - pc_next_iv_i_a2_1, - pc_next_iv_i_a2_0, - pc_next_iv_0_0, + pc_next_iv_9, + pc_next_iv_8, pc_next_iv_7, pc_next_iv_6, pc_next_iv_5, pc_next_iv_4, pc_next_iv_3, + pc_next_iv_2, pc_next_iv_1, - pc_next_iv_0_d0, + pc_next_iv_0, + pc_next_iv_0_0, dout_2_7, dout_2_6, dout_2_5, @@ -971,17 +971,17 @@ input c_2 ; input c_1 ; input c_0 ; -input pc_next_iv_i_a2_2 ; -input pc_next_iv_i_a2_1 ; -input pc_next_iv_i_a2_0 ; -input pc_next_iv_0_0 ; +input pc_next_iv_9 ; +input pc_next_iv_8 ; input pc_next_iv_7 ; input pc_next_iv_6 ; input pc_next_iv_5 ; input pc_next_iv_4 ; input pc_next_iv_3 ; +input pc_next_iv_2 ; input pc_next_iv_1 ; -input pc_next_iv_0_d0 ; +input pc_next_iv_0 ; +input pc_next_iv_0_0 ; input dout_2_7 ; input dout_2_6 ; input dout_2_5 ; @@ -1019,17 +1019,17 @@ wire c_2 ; wire c_1 ; wire c_0 ; -wire pc_next_iv_i_a2_2 ; -wire pc_next_iv_i_a2_1 ; -wire pc_next_iv_i_a2_0 ; -wire pc_next_iv_0_0 ; +wire pc_next_iv_9 ; +wire pc_next_iv_8 ; wire pc_next_iv_7 ; wire pc_next_iv_6 ; wire pc_next_iv_5 ; wire pc_next_iv_4 ; wire pc_next_iv_3 ; +wire pc_next_iv_2 ; wire pc_next_iv_1 ; -wire pc_next_iv_0_d0 ; +wire pc_next_iv_0 ; +wire pc_next_iv_0_0 ; wire dout_2_7 ; wire dout_2_6 ; wire dout_2_5 ; @@ -1062,9 +1062,9 @@ .data_a({GND, GND, GND, GND, GND, GND, GND, GND}), .data_b({dout_2_7, dout_2_6, dout_2_5, dout_2_4, dout_2_3, dout_2_2, dout_2_1, dout_2_0}), - .address_a({pc_next_iv_i_a2_2, pc_next_iv_i_a2_1, pc_next_iv_i_a2_0, pc_next_iv_7, - pc_next_iv_6, pc_next_iv_5, pc_next_iv_4, pc_next_iv_3, pc_next_iv_0_0, - pc_next_iv_1, pc_next_iv_0_d0}), + .address_a({pc_next_iv_9, pc_next_iv_8, pc_next_iv_7, pc_next_iv_6, pc_next_iv_5, + pc_next_iv_4, pc_next_iv_3, pc_next_iv_2, pc_next_iv_1, pc_next_iv_0, + pc_next_iv_0_0}), .address_b({c_10, c_9, c_8, c_7, c_6, c_5, c_4, c_3, c_2, c_1, c_0}), .clock0(CLK), .q_a({ins2core_7, ins2core_6, ins2core_5, ins2core_4, ins2core_3, ins2core_2, @@ -1084,14 +1084,6 @@ dout_2_5, dout_2_6, dout_2_7, - dout_1_x_0, - dout_1_x_1, - dout_1_x_2, - dout_1_x_3, - dout_1_x_4, - dout_1_x_5, - dout_1_x_6, - dout_1_x_7, dout_1_0, dout_1_1, dout_1_2, @@ -1100,6 +1092,14 @@ dout_1_5, dout_1_6, dout_1_7, + dout_1_8, + dout_1_9, + dout_1_10, + dout_1_11, + dout_1_12, + dout_1_13, + dout_1_14, + dout_1_15, wr_en_0_0_0, wr_en_0_0_1, wr_en_0_0_2, @@ -1112,17 +1112,17 @@ dout_1_2_5, dout_1_2_6, dout_1_2_7, - pc_next_iv_0_d0, + pc_next_iv_0_0, + pc_next_iv_0, pc_next_iv_1, + pc_next_iv_2, pc_next_iv_3, pc_next_iv_4, pc_next_iv_5, pc_next_iv_6, pc_next_iv_7, - pc_next_iv_0_0, - pc_next_iv_i_a2_0, - pc_next_iv_i_a2_1, - pc_next_iv_i_a2_2, + pc_next_iv_8, + pc_next_iv_9, c_0, c_1, c_2, @@ -1208,14 +1208,6 @@ input dout_2_5 ; input dout_2_6 ; input dout_2_7 ; -input dout_1_x_0 ; -input dout_1_x_1 ; -input dout_1_x_2 ; -input dout_1_x_3 ; -input dout_1_x_4 ; -input dout_1_x_5 ; -input dout_1_x_6 ; -input dout_1_x_7 ; input dout_1_0 ; input dout_1_1 ; input dout_1_2 ; @@ -1224,6 +1216,14 @@ input dout_1_5 ; input dout_1_6 ; input dout_1_7 ; +input dout_1_8 ; +input dout_1_9 ; +input dout_1_10 ; +input dout_1_11 ; +input dout_1_12 ; +input dout_1_13 ; +input dout_1_14 ; +input dout_1_15 ; input wr_en_0_0_0 ; input wr_en_0_0_1 ; input wr_en_0_0_2 ; @@ -1236,17 +1236,17 @@ input dout_1_2_5 ; input dout_1_2_6 ; input dout_1_2_7 ; -input pc_next_iv_0_d0 ; +input pc_next_iv_0_0 ; +input pc_next_iv_0 ; input pc_next_iv_1 ; +input pc_next_iv_2 ; input pc_next_iv_3 ; input pc_next_iv_4 ; input pc_next_iv_5 ; input pc_next_iv_6 ; input pc_next_iv_7 ; -input pc_next_iv_0_0 ; -input pc_next_iv_i_a2_0 ; -input pc_next_iv_i_a2_1 ; -input pc_next_iv_i_a2_2 ; +input pc_next_iv_8 ; +input pc_next_iv_9 ; input c_0 ; input c_1 ; input c_2 ; @@ -1331,14 +1331,6 @@ wire dout_2_5 ; wire dout_2_6 ; wire dout_2_7 ; -wire dout_1_x_0 ; -wire dout_1_x_1 ; -wire dout_1_x_2 ; -wire dout_1_x_3 ; -wire dout_1_x_4 ; -wire dout_1_x_5 ; -wire dout_1_x_6 ; -wire dout_1_x_7 ; wire dout_1_0 ; wire dout_1_1 ; wire dout_1_2 ; @@ -1347,6 +1339,14 @@ wire dout_1_5 ; wire dout_1_6 ; wire dout_1_7 ; +wire dout_1_8 ; +wire dout_1_9 ; +wire dout_1_10 ; +wire dout_1_11 ; +wire dout_1_12 ; +wire dout_1_13 ; +wire dout_1_14 ; +wire dout_1_15 ; wire wr_en_0_0_0 ; wire wr_en_0_0_1 ; wire wr_en_0_0_2 ; @@ -1359,17 +1359,17 @@ wire dout_1_2_5 ; wire dout_1_2_6 ; wire dout_1_2_7 ; -wire pc_next_iv_0_d0 ; +wire pc_next_iv_0_0 ; +wire pc_next_iv_0 ; wire pc_next_iv_1 ; +wire pc_next_iv_2 ; wire pc_next_iv_3 ; wire pc_next_iv_4 ; wire pc_next_iv_5 ; wire pc_next_iv_6 ; wire pc_next_iv_7 ; -wire pc_next_iv_0_0 ; -wire pc_next_iv_i_a2_0 ; -wire pc_next_iv_i_a2_1 ; -wire pc_next_iv_i_a2_2 ; +wire pc_next_iv_8 ; +wire pc_next_iv_9 ; wire c_0 ; wire c_1 ; wire c_2 ; @@ -1479,17 +1479,17 @@ .c_2(c_2), .c_1(c_1), .c_0(c_0), - .pc_next_iv_i_a2_2(pc_next_iv_i_a2_2), - .pc_next_iv_i_a2_1(pc_next_iv_i_a2_1), - .pc_next_iv_i_a2_0(pc_next_iv_i_a2_0), - .pc_next_iv_0_0(pc_next_iv_0_0), + .pc_next_iv_9(pc_next_iv_9), + .pc_next_iv_8(pc_next_iv_8), .pc_next_iv_7(pc_next_iv_7), .pc_next_iv_6(pc_next_iv_6), .pc_next_iv_5(pc_next_iv_5), .pc_next_iv_4(pc_next_iv_4), .pc_next_iv_3(pc_next_iv_3), + .pc_next_iv_2(pc_next_iv_2), .pc_next_iv_1(pc_next_iv_1), - .pc_next_iv_0_d0(pc_next_iv_0_d0), + .pc_next_iv_0(pc_next_iv_0), + .pc_next_iv_0_0(pc_next_iv_0_0), .dout_1_2_7(dout_1_2_7), .dout_1_2_6(dout_1_2_6), .dout_1_2_5(dout_1_2_5), @@ -1530,25 +1530,25 @@ .c_2(c_2), .c_1(c_1), .c_0(c_0), - .pc_next_iv_i_a2_2(pc_next_iv_i_a2_2), - .pc_next_iv_i_a2_1(pc_next_iv_i_a2_1), - .pc_next_iv_i_a2_0(pc_next_iv_i_a2_0), - .pc_next_iv_0_0(pc_next_iv_0_0), + .pc_next_iv_9(pc_next_iv_9), + .pc_next_iv_8(pc_next_iv_8), .pc_next_iv_7(pc_next_iv_7), .pc_next_iv_6(pc_next_iv_6), .pc_next_iv_5(pc_next_iv_5), .pc_next_iv_4(pc_next_iv_4), .pc_next_iv_3(pc_next_iv_3), + .pc_next_iv_2(pc_next_iv_2), .pc_next_iv_1(pc_next_iv_1), - .pc_next_iv_0_d0(pc_next_iv_0_d0), - .dout_1_7(dout_1_7), - .dout_1_6(dout_1_6), - .dout_1_5(dout_1_5), - .dout_1_4(dout_1_4), - .dout_1_3(dout_1_3), - .dout_1_2(dout_1_2), - .dout_1_1(dout_1_1), - .dout_1_0(dout_1_0), + .pc_next_iv_0(pc_next_iv_0), + .pc_next_iv_0_0(pc_next_iv_0_0), + .dout_1_7(dout_1_15), + .dout_1_6(dout_1_14), + .dout_1_5(dout_1_13), + .dout_1_4(dout_1_12), + .dout_1_3(dout_1_11), + .dout_1_2(dout_1_10), + .dout_1_1(dout_1_9), + .dout_1_0(dout_1_8), .wr_en_0_0_0(wr_en_0_0_2), .CLK(CLK) ); @@ -1581,25 +1581,25 @@ .c_2(c_2), .c_1(c_1), .c_0(c_0), - .pc_next_iv_i_a2_2(pc_next_iv_i_a2_2), - .pc_next_iv_i_a2_1(pc_next_iv_i_a2_1), - .pc_next_iv_i_a2_0(pc_next_iv_i_a2_0), - .pc_next_iv_0_0(pc_next_iv_0_0), + .pc_next_iv_9(pc_next_iv_9), + .pc_next_iv_8(pc_next_iv_8), .pc_next_iv_7(pc_next_iv_7), .pc_next_iv_6(pc_next_iv_6), .pc_next_iv_5(pc_next_iv_5), .pc_next_iv_4(pc_next_iv_4), .pc_next_iv_3(pc_next_iv_3), + .pc_next_iv_2(pc_next_iv_2), .pc_next_iv_1(pc_next_iv_1), - .pc_next_iv_0_d0(pc_next_iv_0_d0), - .dout_1_x_7(dout_1_x_7), - .dout_1_x_6(dout_1_x_6), - .dout_1_x_5(dout_1_x_5), - .dout_1_x_4(dout_1_x_4), - .dout_1_x_3(dout_1_x_3), - .dout_1_x_2(dout_1_x_2), - .dout_1_x_1(dout_1_x_1), - .dout_1_x_0(dout_1_x_0), + .pc_next_iv_0(pc_next_iv_0), + .pc_next_iv_0_0(pc_next_iv_0_0), + .dout_1_7(dout_1_7), + .dout_1_6(dout_1_6), + .dout_1_5(dout_1_5), + .dout_1_4(dout_1_4), + .dout_1_3(dout_1_3), + .dout_1_2(dout_1_2), + .dout_1_1(dout_1_1), + .dout_1_0(dout_1_0), .wr_en_0_0_0(wr_en_0_0_1), .CLK(CLK) ); @@ -1632,17 +1632,17 @@ .c_2(c_2), .c_1(c_1), .c_0(c_0), - .pc_next_iv_i_a2_2(pc_next_iv_i_a2_2), - .pc_next_iv_i_a2_1(pc_next_iv_i_a2_1), - .pc_next_iv_i_a2_0(pc_next_iv_i_a2_0), - .pc_next_iv_0_0(pc_next_iv_0_0), + .pc_next_iv_9(pc_next_iv_9), + .pc_next_iv_8(pc_next_iv_8), .pc_next_iv_7(pc_next_iv_7), .pc_next_iv_6(pc_next_iv_6), .pc_next_iv_5(pc_next_iv_5), .pc_next_iv_4(pc_next_iv_4), .pc_next_iv_3(pc_next_iv_3), + .pc_next_iv_2(pc_next_iv_2), .pc_next_iv_1(pc_next_iv_1), - .pc_next_iv_0_d0(pc_next_iv_0_d0), + .pc_next_iv_0(pc_next_iv_0), + .pc_next_iv_0_0(pc_next_iv_0_0), .dout_2_7(dout_2_7), .dout_2_6(dout_2_6), .dout_2_5(dout_2_5), @@ -1658,6 +1658,7 @@ // VQM4.1+ module infile_dmem_ctl_reg ( + c_0, dmem_ctl_o_0, dmem_ctl_o_1, dmem_ctl_o_2, @@ -1666,20 +1667,9 @@ ctl_o_1, ctl_o_2, ctl_o_3, - c_1_0, - alu_func_o_0, - shift_out_92_0, - c_5_0, - c_a_0, - byte_addr_o_0, - byte_addr_o_1, - c_30, - c_0, - m18, - m22, - shift_out_sn_m31_i, CLK ); +input c_0 ; input dmem_ctl_o_0 ; input dmem_ctl_o_1 ; input dmem_ctl_o_2 ; @@ -1688,19 +1678,8 @@ output ctl_o_1 ; output ctl_o_2 ; output ctl_o_3 ; -input c_1_0 ; -input alu_func_o_0 ; -input shift_out_92_0 ; -input c_5_0 ; -input c_a_0 ; -output byte_addr_o_0 ; -output byte_addr_o_1 ; -input c_30 ; -output c_0 ; -input m18 ; -input m22 ; -input shift_out_sn_m31_i ; input CLK ; +wire c_0 ; wire dmem_ctl_o_0 ; wire dmem_ctl_o_1 ; wire dmem_ctl_o_2 ; @@ -1709,74 +1688,19 @@ wire ctl_o_1 ; wire ctl_o_2 ; wire ctl_o_3 ; -wire c_1_0 ; -wire alu_func_o_0 ; -wire shift_out_92_0 ; -wire c_5_0 ; -wire c_a_0 ; -wire byte_addr_o_0 ; -wire byte_addr_o_1 ; -wire c_30 ; -wire c_0 ; -wire m18 ; -wire m22 ; -wire shift_out_sn_m31_i ; wire CLK ; wire GND ; wire VCC ; assign VCC = 1'b1; assign GND = 1'b0; -// @13:102 - cyclone_lcell byte_addr_o_1__Z ( - .combout(c_0), - .regout(byte_addr_o_1), - .clk(CLK), - .dataa(shift_out_sn_m31_i), - .datab(c_a_0), - .datac(c_5_0), - .datad(shift_out_92_0), - .aclr(GND), - .sclr(GND), - .sload(GND), - .ena(VCC), - .inverta(GND), - .aload(GND), - .regcascin(GND) -); -defparam byte_addr_o_1__Z.operation_mode="normal"; -defparam byte_addr_o_1__Z.output_mode="reg_and_comb"; -defparam byte_addr_o_1__Z.lut_mask="fbf1"; -defparam byte_addr_o_1__Z.synch_mode="off"; -defparam byte_addr_o_1__Z.sum_lutc_input="datac"; -// @13:102 - cyclone_lcell byte_addr_o_0__Z ( - .regout(byte_addr_o_0), - .clk(CLK), - .dataa(alu_func_o_0), - .datab(m22), - .datac(c_1_0), - .datad(m18), - .aclr(GND), - .sclr(GND), - .sload(GND), - .ena(VCC), - .inverta(GND), - .aload(GND), - .regcascin(GND) -); -defparam byte_addr_o_0__Z.operation_mode="normal"; -defparam byte_addr_o_0__Z.output_mode="reg_only"; -defparam byte_addr_o_0__Z.lut_mask="f8fd"; -defparam byte_addr_o_0__Z.synch_mode="off"; -defparam byte_addr_o_0__Z.sum_lutc_input="datac"; -// @13:102 +// @13:103 cyclone_lcell ctl_o_3__Z ( .regout(ctl_o_3), .clk(CLK), - .dataa(dmem_ctl_o_3), - .datab(c_30), - .datac(VCC), - .datad(VCC), + .dataa(VCC), + .datab(VCC), + .datac(dmem_ctl_o_3), + .datad(c_0), .aclr(GND), .sclr(GND), .sload(GND), @@ -1787,17 +1711,17 @@ ); defparam ctl_o_3__Z.operation_mode="normal"; defparam ctl_o_3__Z.output_mode="reg_only"; -defparam ctl_o_3__Z.lut_mask="2222"; +defparam ctl_o_3__Z.lut_mask="00f0"; defparam ctl_o_3__Z.synch_mode="off"; defparam ctl_o_3__Z.sum_lutc_input="datac"; -// @13:102 +// @13:103 cyclone_lcell ctl_o_2__Z ( .regout(ctl_o_2), .clk(CLK), - .dataa(dmem_ctl_o_2), - .datab(c_30), - .datac(VCC), - .datad(VCC), + .dataa(VCC), + .datab(VCC), + .datac(dmem_ctl_o_2), + .datad(c_0), .aclr(GND), .sclr(GND), .sload(GND), @@ -1808,17 +1732,17 @@ ); defparam ctl_o_2__Z.operation_mode="normal"; defparam ctl_o_2__Z.output_mode="reg_only"; -defparam ctl_o_2__Z.lut_mask="2222"; +defparam ctl_o_2__Z.lut_mask="00f0"; defparam ctl_o_2__Z.synch_mode="off"; defparam ctl_o_2__Z.sum_lutc_input="datac"; -// @13:102 +// @13:103 cyclone_lcell ctl_o_1__Z ( .regout(ctl_o_1), .clk(CLK), - .dataa(dmem_ctl_o_1), - .datab(c_30), - .datac(VCC), - .datad(VCC), + .dataa(VCC), + .datab(VCC), + .datac(dmem_ctl_o_1), + .datad(c_0), .aclr(GND), .sclr(GND), .sload(GND), @@ -1829,17 +1753,17 @@ ); defparam ctl_o_1__Z.operation_mode="normal"; defparam ctl_o_1__Z.output_mode="reg_only"; -defparam ctl_o_1__Z.lut_mask="2222"; +defparam ctl_o_1__Z.lut_mask="00f0"; defparam ctl_o_1__Z.synch_mode="off"; defparam ctl_o_1__Z.sum_lutc_input="datac"; -// @13:102 +// @13:103 cyclone_lcell ctl_o_0__Z ( .regout(ctl_o_0), .clk(CLK), - .dataa(dmem_ctl_o_0), - .datab(c_30), - .datac(VCC), - .datad(VCC), + .dataa(VCC), + .datab(VCC), + .datac(dmem_ctl_o_0), + .datad(c_0), .aclr(GND), .sclr(GND), .sload(GND), @@ -1850,57 +1774,59 @@ ); defparam ctl_o_0__Z.operation_mode="normal"; defparam ctl_o_0__Z.output_mode="reg_only"; -defparam ctl_o_0__Z.lut_mask="2222"; +defparam ctl_o_0__Z.lut_mask="00f0"; defparam ctl_o_0__Z.synch_mode="off"; defparam ctl_o_0__Z.sum_lutc_input="datac"; endmodule /* infile_dmem_ctl_reg */ // VQM4.1+ module mem_addr_ctl ( + c_4_0, c_0, - c_1, - dmem_ctl_o_1, - dmem_ctl_o_2, dmem_ctl_o_0, dmem_ctl_o_3, + dmem_ctl_o_2, + dmem_ctl_o_1, wr_en_0_0_3, - wr_en_0_0_1, wr_en_0_0_2, - wr_en_0_0_0 + wr_en_0_0_1, + wr_en_0_0_0, + m75 ); +input c_4_0 ; input c_0 ; -input c_1 ; -input dmem_ctl_o_1 ; -input dmem_ctl_o_2 ; input dmem_ctl_o_0 ; input dmem_ctl_o_3 ; +input dmem_ctl_o_2 ; +input dmem_ctl_o_1 ; output wr_en_0_0_3 ; -output wr_en_0_0_1 ; output wr_en_0_0_2 ; +output wr_en_0_0_1 ; output wr_en_0_0_0 ; +input m75 ; +wire c_4_0 ; wire c_0 ; -wire c_1 ; -wire dmem_ctl_o_1 ; -wire dmem_ctl_o_2 ; wire dmem_ctl_o_0 ; wire dmem_ctl_o_3 ; +wire dmem_ctl_o_2 ; +wire dmem_ctl_o_1 ; wire wr_en_0_0_3 ; -wire wr_en_0_0_1 ; wire wr_en_0_0_2 ; +wire wr_en_0_0_1 ; wire wr_en_0_0_0 ; -wire [0:0] wr_en_0_0_a3_0; -wire [0:0] wr_en_0_0_a; -wire [1:1] wr_en_0_0_a3_1; +wire m75 ; +wire [0:0] wr_en_0_0_a2; +wire [3:0] wr_en_0_0_a; wire GND ; wire VCC ; assign VCC = 1'b1; assign GND = 1'b0; -// @13:116 +// @13:117 cyclone_lcell wr_en_0_0_0_ ( .combout(wr_en_0_0_0), - .dataa(dmem_ctl_o_3), - .datab(wr_en_0_0_a3_0[0]), - .datac(c_1), + .dataa(dmem_ctl_o_1), + .datab(dmem_ctl_o_2), + .datac(wr_en_0_0_a2[0]), .datad(wr_en_0_0_a[0]), .aclr(GND), .sclr(GND), @@ -1912,16 +1838,16 @@ ); defparam wr_en_0_0_0_.operation_mode="normal"; defparam wr_en_0_0_0_.output_mode="comb_only"; -defparam wr_en_0_0_0_.lut_mask="dccc"; +defparam wr_en_0_0_0_.lut_mask="c050"; defparam wr_en_0_0_0_.synch_mode="off"; defparam wr_en_0_0_0_.sum_lutc_input="datac"; -// @13:116 +// @13:117 cyclone_lcell wr_en_0_0_a_0_ ( .combout(wr_en_0_0_a[0]), - .dataa(dmem_ctl_o_0), - .datab(dmem_ctl_o_2), - .datac(dmem_ctl_o_1), - .datad(c_0), + .dataa(dmem_ctl_o_2), + .datab(m75), + .datac(c_0), + .datad(c_4_0), .aclr(GND), .sclr(GND), .sload(GND), @@ -1932,16 +1858,56 @@ ); defparam wr_en_0_0_a_0_.operation_mode="normal"; defparam wr_en_0_0_a_0_.output_mode="comb_only"; -defparam wr_en_0_0_a_0_.lut_mask="0a88"; +defparam wr_en_0_0_a_0_.lut_mask="0535"; defparam wr_en_0_0_a_0_.synch_mode="off"; defparam wr_en_0_0_a_0_.sum_lutc_input="datac"; -// @13:116 +// @13:117 + cyclone_lcell wr_en_0_0_1_ ( + .combout(wr_en_0_0_1), + .dataa(dmem_ctl_o_1), + .datab(dmem_ctl_o_2), + .datac(wr_en_0_0_a2[0]), + .datad(wr_en_0_0_a[1]), + .aclr(GND), + .sclr(GND), + .sload(GND), + .ena(VCC), + .inverta(GND), + .aload(GND), + .regcascin(GND) +); +defparam wr_en_0_0_1_.operation_mode="normal"; +defparam wr_en_0_0_1_.output_mode="comb_only"; +defparam wr_en_0_0_1_.lut_mask="d040"; +defparam wr_en_0_0_1_.synch_mode="off"; +defparam wr_en_0_0_1_.sum_lutc_input="datac"; +// @13:117 + cyclone_lcell wr_en_0_0_a_1_ ( + .combout(wr_en_0_0_a[1]), + .dataa(m75), + .datab(c_0), + .datac(c_4_0), + .datad(VCC), + .aclr(GND), + .sclr(GND), + .sload(GND), + .ena(VCC), + .inverta(GND), + .aload(GND), + .regcascin(GND) +); +defparam wr_en_0_0_a_1_.operation_mode="normal"; +defparam wr_en_0_0_a_1_.output_mode="comb_only"; +defparam wr_en_0_0_a_1_.lut_mask="0404"; +defparam wr_en_0_0_a_1_.synch_mode="off"; +defparam wr_en_0_0_a_1_.sum_lutc_input="datac"; +// @13:117 cyclone_lcell wr_en_0_0_2_ ( .combout(wr_en_0_0_2), - .dataa(dmem_ctl_o_3), - .datab(wr_en_0_0_a3_0[0]), - .datac(c_1), - .datad(wr_en_0_0_a[0]), + .dataa(dmem_ctl_o_1), + .datab(dmem_ctl_o_2), + .datac(wr_en_0_0_a2[0]), + .datad(wr_en_0_0_a[2]), .aclr(GND), .sclr(GND), .sload(GND), @@ -1952,16 +1918,16 @@ ); defparam wr_en_0_0_2_.operation_mode="normal"; defparam wr_en_0_0_2_.output_mode="comb_only"; -defparam wr_en_0_0_2_.lut_mask="cdcc"; +defparam wr_en_0_0_2_.lut_mask="d040"; defparam wr_en_0_0_2_.synch_mode="off"; defparam wr_en_0_0_2_.sum_lutc_input="datac"; -// @13:116 - cyclone_lcell wr_en_0_0_1_ ( - .combout(wr_en_0_0_1), - .dataa(wr_en_0_0_a3_1[1]), - .datab(wr_en_0_0_a3_0[0]), - .datac(c_1), - .datad(c_0), +// @13:117 + cyclone_lcell wr_en_0_0_a_2_ ( + .combout(wr_en_0_0_a[2]), + .dataa(dmem_ctl_o_2), + .datab(m75), + .datac(c_0), + .datad(c_4_0), .aclr(GND), .sclr(GND), .sload(GND), @@ -1970,18 +1936,18 @@ .aload(GND), .regcascin(GND) ); -defparam wr_en_0_0_1_.operation_mode="normal"; -defparam wr_en_0_0_1_.output_mode="comb_only"; -defparam wr_en_0_0_1_.lut_mask="ccec"; -defparam wr_en_0_0_1_.synch_mode="off"; -defparam wr_en_0_0_1_.sum_lutc_input="datac"; -// @13:116 +defparam wr_en_0_0_a_2_.operation_mode="normal"; +defparam wr_en_0_0_a_2_.output_mode="comb_only"; +defparam wr_en_0_0_a_2_.lut_mask="0506"; +defparam wr_en_0_0_a_2_.synch_mode="off"; +defparam wr_en_0_0_a_2_.sum_lutc_input="datac"; +// @13:117 cyclone_lcell wr_en_0_0_3_ ( .combout(wr_en_0_0_3), - .dataa(wr_en_0_0_a3_1[1]), - .datab(wr_en_0_0_a3_0[0]), - .datac(c_1), - .datad(c_0), + .dataa(dmem_ctl_o_1), + .datab(dmem_ctl_o_2), + .datac(wr_en_0_0_a2[0]), + .datad(wr_en_0_0_a[3]), .aclr(GND), .sclr(GND), .sload(GND), @@ -1992,16 +1958,16 @@ ); defparam wr_en_0_0_3_.operation_mode="normal"; defparam wr_en_0_0_3_.output_mode="comb_only"; -defparam wr_en_0_0_3_.lut_mask="ccce"; +defparam wr_en_0_0_3_.lut_mask="d040"; defparam wr_en_0_0_3_.synch_mode="off"; defparam wr_en_0_0_3_.sum_lutc_input="datac"; -// @13:116 - cyclone_lcell wr_en_0_0_a3_0_0_ ( - .combout(wr_en_0_0_a3_0[0]), - .dataa(dmem_ctl_o_0), - .datab(dmem_ctl_o_3), - .datac(dmem_ctl_o_2), - .datad(dmem_ctl_o_1), +// @13:117 + cyclone_lcell wr_en_0_0_a_3_ ( + .combout(wr_en_0_0_a[3]), + .dataa(m75), + .datab(c_0), + .datac(c_4_0), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2010,18 +1976,18 @@ .aload(GND), .regcascin(GND) ); -defparam wr_en_0_0_a3_0_0_.operation_mode="normal"; -defparam wr_en_0_0_a3_0_0_.output_mode="comb_only"; -defparam wr_en_0_0_a3_0_0_.lut_mask="0020"; -defparam wr_en_0_0_a3_0_0_.synch_mode="off"; -defparam wr_en_0_0_a3_0_0_.sum_lutc_input="datac"; -// @13:116 - cyclone_lcell wr_en_0_0_a3_1_1_ ( - .combout(wr_en_0_0_a3_1[1]), - .dataa(dmem_ctl_o_0), - .datab(dmem_ctl_o_3), - .datac(dmem_ctl_o_2), - .datad(dmem_ctl_o_1), +defparam wr_en_0_0_a_3_.operation_mode="normal"; +defparam wr_en_0_0_a_3_.output_mode="comb_only"; +defparam wr_en_0_0_a_3_.lut_mask="0101"; +defparam wr_en_0_0_a_3_.synch_mode="off"; +defparam wr_en_0_0_a_3_.sum_lutc_input="datac"; +// @13:117 + cyclone_lcell wr_en_0_0_a2_0_ ( + .combout(wr_en_0_0_a2[0]), + .dataa(dmem_ctl_o_3), + .datab(dmem_ctl_o_0), + .datac(VCC), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2030,11 +1996,11 @@ .aload(GND), .regcascin(GND) ); -defparam wr_en_0_0_a3_1_1_.operation_mode="normal"; -defparam wr_en_0_0_a3_1_1_.output_mode="comb_only"; -defparam wr_en_0_0_a3_1_1_.lut_mask="2022"; -defparam wr_en_0_0_a3_1_1_.synch_mode="off"; -defparam wr_en_0_0_a3_1_1_.sum_lutc_input="datac"; +defparam wr_en_0_0_a2_0_.operation_mode="normal"; +defparam wr_en_0_0_a2_0_.output_mode="comb_only"; +defparam wr_en_0_0_a2_0_.lut_mask="4444"; +defparam wr_en_0_0_a2_0_.synch_mode="off"; +defparam wr_en_0_0_a2_0_.sum_lutc_input="datac"; endmodule /* mem_addr_ctl */ // VQM4.1+ @@ -2047,18 +2013,17 @@ dout_1_5, dout_1_6, dout_1_7, - dmem_ctl_o_1, - dmem_ctl_o_2, - dmem_ctl_o_0, - dmem_ctl_o_3, - dout_1_2_7, - dout_1_2_6, - dout_1_2_5, - dout_1_2_4, - dout_1_2_3, - dout_1_2_2, - dout_1_2_1, - dout_1_2_0, + dout_1_8, + dout_1_9, + dout_1_10, + dout_1_11, + dout_1_12, + dout_1_13, + dout_1_14, + dout_1_15, + dout_2_i_5, + dout_2_i_3, + dout_2_i_0, dout_2_16, dout_2_17, dout_2_18, @@ -2067,38 +2032,37 @@ dout_2_21, dout_2_22, dout_2_23, - dout_2_24, - dout_2_25, - dout_2_26, - dout_2_27, - dout_2_28, - dout_2_29, - dout_2_30, + dout_2_15, dout_2_31, dout_2_7, - dout_2_15, - dout_2_6, dout_2_14, - dout_2_5, - dout_2_13, - dout_2_4, + dout_2_30, + dout_2_6, dout_2_12, - dout_2_3, - dout_2_11, - dout_2_2, + dout_2_28, + dout_2_4, dout_2_10, - dout_2_1, + dout_2_26, + dout_2_2, dout_2_9, - dout_2_0, + dout_2_25, + dout_2_1, + dout_2_13, + dout_2_5, + dout_2_11, + dout_2_3, dout_2_8, - dout_1_x_7, - dout_1_x_6, - dout_1_x_5, - dout_1_x_4, - dout_1_x_3, - dout_1_x_2, - dout_1_x_1, - dout_1_x_0 + dout_2_0, + dmem_ctl_o_0, + dmem_ctl_o_1, + dout_1_2_7, + dout_1_2_6, + dout_1_2_4, + dout_1_2_2, + dout_1_2_1, + dout_1_2_5, + dout_1_2_3, + dout_1_2_0 ); output dout_1_0 ; output dout_1_1 ; @@ -2108,18 +2072,17 @@ output dout_1_5 ; output dout_1_6 ; output dout_1_7 ; -input dmem_ctl_o_1 ; -input dmem_ctl_o_2 ; -input dmem_ctl_o_0 ; -input dmem_ctl_o_3 ; -output dout_1_2_7 ; -output dout_1_2_6 ; -output dout_1_2_5 ; -output dout_1_2_4 ; -output dout_1_2_3 ; -output dout_1_2_2 ; -output dout_1_2_1 ; -output dout_1_2_0 ; +output dout_1_8 ; +output dout_1_9 ; +output dout_1_10 ; +output dout_1_11 ; +output dout_1_12 ; +output dout_1_13 ; +output dout_1_14 ; +output dout_1_15 ; +input dout_2_i_5 ; +input dout_2_i_3 ; +input dout_2_i_0 ; input dout_2_16 ; input dout_2_17 ; input dout_2_18 ; @@ -2128,38 +2091,37 @@ input dout_2_21 ; input dout_2_22 ; input dout_2_23 ; -input dout_2_24 ; -input dout_2_25 ; -input dout_2_26 ; -input dout_2_27 ; -input dout_2_28 ; -input dout_2_29 ; -input dout_2_30 ; +input dout_2_15 ; input dout_2_31 ; input dout_2_7 ; -input dout_2_15 ; -input dout_2_6 ; input dout_2_14 ; -input dout_2_5 ; -input dout_2_13 ; -input dout_2_4 ; +input dout_2_30 ; +input dout_2_6 ; input dout_2_12 ; -input dout_2_3 ; -input dout_2_11 ; -input dout_2_2 ; +input dout_2_28 ; +input dout_2_4 ; input dout_2_10 ; -input dout_2_1 ; +input dout_2_26 ; +input dout_2_2 ; input dout_2_9 ; -input dout_2_0 ; +input dout_2_25 ; +input dout_2_1 ; +input dout_2_13 ; +input dout_2_5 ; +input dout_2_11 ; +input dout_2_3 ; input dout_2_8 ; -output dout_1_x_7 ; -output dout_1_x_6 ; -output dout_1_x_5 ; -output dout_1_x_4 ; -output dout_1_x_3 ; -output dout_1_x_2 ; -output dout_1_x_1 ; -output dout_1_x_0 ; +input dout_2_0 ; +input dmem_ctl_o_0 ; +input dmem_ctl_o_1 ; +output dout_1_2_7 ; +output dout_1_2_6 ; +output dout_1_2_4 ; +output dout_1_2_2 ; +output dout_1_2_1 ; +output dout_1_2_5 ; +output dout_1_2_3 ; +output dout_1_2_0 ; wire dout_1_0 ; wire dout_1_1 ; wire dout_1_2 ; @@ -2168,18 +2130,17 @@ wire dout_1_5 ; wire dout_1_6 ; wire dout_1_7 ; -wire dmem_ctl_o_1 ; -wire dmem_ctl_o_2 ; -wire dmem_ctl_o_0 ; -wire dmem_ctl_o_3 ; -wire dout_1_2_7 ; -wire dout_1_2_6 ; -wire dout_1_2_5 ; -wire dout_1_2_4 ; -wire dout_1_2_3 ; -wire dout_1_2_2 ; -wire dout_1_2_1 ; -wire dout_1_2_0 ; +wire dout_1_8 ; +wire dout_1_9 ; +wire dout_1_10 ; +wire dout_1_11 ; +wire dout_1_12 ; +wire dout_1_13 ; +wire dout_1_14 ; +wire dout_1_15 ; +wire dout_2_i_5 ; +wire dout_2_i_3 ; +wire dout_2_i_0 ; wire dout_2_16 ; wire dout_2_17 ; wire dout_2_18 ; @@ -2188,51 +2149,48 @@ wire dout_2_21 ; wire dout_2_22 ; wire dout_2_23 ; -wire dout_2_24 ; -wire dout_2_25 ; -wire dout_2_26 ; -wire dout_2_27 ; -wire dout_2_28 ; -wire dout_2_29 ; -wire dout_2_30 ; +wire dout_2_15 ; wire dout_2_31 ; wire dout_2_7 ; -wire dout_2_15 ; -wire dout_2_6 ; wire dout_2_14 ; -wire dout_2_5 ; -wire dout_2_13 ; -wire dout_2_4 ; +wire dout_2_30 ; +wire dout_2_6 ; wire dout_2_12 ; -wire dout_2_3 ; -wire dout_2_11 ; -wire dout_2_2 ; +wire dout_2_28 ; +wire dout_2_4 ; wire dout_2_10 ; -wire dout_2_1 ; +wire dout_2_26 ; +wire dout_2_2 ; wire dout_2_9 ; -wire dout_2_0 ; +wire dout_2_25 ; +wire dout_2_1 ; +wire dout_2_13 ; +wire dout_2_5 ; +wire dout_2_11 ; +wire dout_2_3 ; wire dout_2_8 ; -wire dout_1_x_7 ; -wire dout_1_x_6 ; -wire dout_1_x_5 ; -wire dout_1_x_4 ; -wire dout_1_x_3 ; -wire dout_1_x_2 ; -wire dout_1_x_1 ; -wire dout_1_x_0 ; -wire [31:24] dout_1_2_a_x; -wire dout21 ; -wire dout22 ; +wire dout_2_0 ; +wire dmem_ctl_o_0 ; +wire dmem_ctl_o_1 ; +wire dout_1_2_7 ; +wire dout_1_2_6 ; +wire dout_1_2_4 ; +wire dout_1_2_2 ; +wire dout_1_2_1 ; +wire dout_1_2_5 ; +wire dout_1_2_3 ; +wire dout_1_2_0 ; +wire [31:24] dout_1_2_a; wire GND ; wire VCC ; assign VCC = 1'b1; assign GND = 1'b0; -// @13:225 - cyclone_lcell dout_1_x_8_ ( - .combout(dout_1_x_0), - .dataa(dout21), - .datab(dout_2_8), - .datac(dout_2_0), +// @13:202 + cyclone_lcell dout_1_2_24_ ( + .combout(dout_1_2_0), + .dataa(dmem_ctl_o_1), + .datab(dout_2_0), + .datac(dout_1_2_a[24]), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2242,17 +2200,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_x_8_.operation_mode="normal"; -defparam dout_1_x_8_.output_mode="comb_only"; -defparam dout_1_x_8_.lut_mask="e4e4"; -defparam dout_1_x_8_.synch_mode="off"; -defparam dout_1_x_8_.sum_lutc_input="datac"; -// @13:225 - cyclone_lcell dout_1_x_9_ ( - .combout(dout_1_x_1), - .dataa(dout21), - .datab(dout_2_9), - .datac(dout_2_1), +defparam dout_1_2_24_.operation_mode="normal"; +defparam dout_1_2_24_.output_mode="comb_only"; +defparam dout_1_2_24_.lut_mask="4e4e"; +defparam dout_1_2_24_.synch_mode="off"; +defparam dout_1_2_24_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_a_24_ ( + .combout(dout_1_2_a[24]), + .dataa(dmem_ctl_o_0), + .datab(dout_2_8), + .datac(dout_2_i_0), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2262,17 +2220,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_x_9_.operation_mode="normal"; -defparam dout_1_x_9_.output_mode="comb_only"; -defparam dout_1_x_9_.lut_mask="e4e4"; -defparam dout_1_x_9_.synch_mode="off"; -defparam dout_1_x_9_.sum_lutc_input="datac"; -// @13:225 - cyclone_lcell dout_1_x_10_ ( - .combout(dout_1_x_2), - .dataa(dout21), - .datab(dout_2_10), - .datac(dout_2_2), +defparam dout_1_2_a_24_.operation_mode="normal"; +defparam dout_1_2_a_24_.output_mode="comb_only"; +defparam dout_1_2_a_24_.lut_mask="2727"; +defparam dout_1_2_a_24_.synch_mode="off"; +defparam dout_1_2_a_24_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_27_ ( + .combout(dout_1_2_3), + .dataa(dmem_ctl_o_1), + .datab(dout_2_3), + .datac(dout_1_2_a[27]), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2282,17 +2240,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_x_10_.operation_mode="normal"; -defparam dout_1_x_10_.output_mode="comb_only"; -defparam dout_1_x_10_.lut_mask="e4e4"; -defparam dout_1_x_10_.synch_mode="off"; -defparam dout_1_x_10_.sum_lutc_input="datac"; -// @13:225 - cyclone_lcell dout_1_x_11_ ( - .combout(dout_1_x_3), - .dataa(dout21), +defparam dout_1_2_27_.operation_mode="normal"; +defparam dout_1_2_27_.output_mode="comb_only"; +defparam dout_1_2_27_.lut_mask="4e4e"; +defparam dout_1_2_27_.synch_mode="off"; +defparam dout_1_2_27_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_a_27_ ( + .combout(dout_1_2_a[27]), + .dataa(dmem_ctl_o_0), .datab(dout_2_11), - .datac(dout_2_3), + .datac(dout_2_i_3), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2302,17 +2260,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_x_11_.operation_mode="normal"; -defparam dout_1_x_11_.output_mode="comb_only"; -defparam dout_1_x_11_.lut_mask="e4e4"; -defparam dout_1_x_11_.synch_mode="off"; -defparam dout_1_x_11_.sum_lutc_input="datac"; -// @13:225 - cyclone_lcell dout_1_x_12_ ( - .combout(dout_1_x_4), - .dataa(dout21), - .datab(dout_2_12), - .datac(dout_2_4), +defparam dout_1_2_a_27_.operation_mode="normal"; +defparam dout_1_2_a_27_.output_mode="comb_only"; +defparam dout_1_2_a_27_.lut_mask="2727"; +defparam dout_1_2_a_27_.synch_mode="off"; +defparam dout_1_2_a_27_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_29_ ( + .combout(dout_1_2_5), + .dataa(dmem_ctl_o_1), + .datab(dout_2_5), + .datac(dout_1_2_a[29]), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2322,17 +2280,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_x_12_.operation_mode="normal"; -defparam dout_1_x_12_.output_mode="comb_only"; -defparam dout_1_x_12_.lut_mask="e4e4"; -defparam dout_1_x_12_.synch_mode="off"; -defparam dout_1_x_12_.sum_lutc_input="datac"; -// @13:225 - cyclone_lcell dout_1_x_13_ ( - .combout(dout_1_x_5), - .dataa(dout21), +defparam dout_1_2_29_.operation_mode="normal"; +defparam dout_1_2_29_.output_mode="comb_only"; +defparam dout_1_2_29_.lut_mask="4e4e"; +defparam dout_1_2_29_.synch_mode="off"; +defparam dout_1_2_29_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_a_29_ ( + .combout(dout_1_2_a[29]), + .dataa(dmem_ctl_o_0), .datab(dout_2_13), - .datac(dout_2_5), + .datac(dout_2_i_5), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2342,17 +2300,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_x_13_.operation_mode="normal"; -defparam dout_1_x_13_.output_mode="comb_only"; -defparam dout_1_x_13_.lut_mask="e4e4"; -defparam dout_1_x_13_.synch_mode="off"; -defparam dout_1_x_13_.sum_lutc_input="datac"; -// @13:225 - cyclone_lcell dout_1_x_14_ ( - .combout(dout_1_x_6), - .dataa(dout21), - .datab(dout_2_14), - .datac(dout_2_6), +defparam dout_1_2_a_29_.operation_mode="normal"; +defparam dout_1_2_a_29_.output_mode="comb_only"; +defparam dout_1_2_a_29_.lut_mask="2727"; +defparam dout_1_2_a_29_.synch_mode="off"; +defparam dout_1_2_a_29_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_25_ ( + .combout(dout_1_2_1), + .dataa(dmem_ctl_o_1), + .datab(dout_2_1), + .datac(dout_1_2_a[25]), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2362,17 +2320,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_x_14_.operation_mode="normal"; -defparam dout_1_x_14_.output_mode="comb_only"; -defparam dout_1_x_14_.lut_mask="e4e4"; -defparam dout_1_x_14_.synch_mode="off"; -defparam dout_1_x_14_.sum_lutc_input="datac"; -// @13:225 - cyclone_lcell dout_1_x_15_ ( - .combout(dout_1_x_7), - .dataa(dout21), - .datab(dout_2_15), - .datac(dout_2_7), +defparam dout_1_2_25_.operation_mode="normal"; +defparam dout_1_2_25_.output_mode="comb_only"; +defparam dout_1_2_25_.lut_mask="4e4e"; +defparam dout_1_2_25_.synch_mode="off"; +defparam dout_1_2_25_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_a_25_ ( + .combout(dout_1_2_a[25]), + .dataa(dmem_ctl_o_0), + .datab(dout_2_25), + .datac(dout_2_9), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2382,17 +2340,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_x_15_.operation_mode="normal"; -defparam dout_1_x_15_.output_mode="comb_only"; -defparam dout_1_x_15_.lut_mask="e4e4"; -defparam dout_1_x_15_.synch_mode="off"; -defparam dout_1_x_15_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_a_x_31_ ( - .combout(dout_1_2_a_x[31]), - .dataa(dout22), - .datab(dout_2_31), - .datac(dout_2_15), +defparam dout_1_2_a_25_.operation_mode="normal"; +defparam dout_1_2_a_25_.output_mode="comb_only"; +defparam dout_1_2_a_25_.lut_mask="1b1b"; +defparam dout_1_2_a_25_.synch_mode="off"; +defparam dout_1_2_a_25_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_26_ ( + .combout(dout_1_2_2), + .dataa(dmem_ctl_o_1), + .datab(dout_2_2), + .datac(dout_1_2_a[26]), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2402,17 +2360,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_a_x_31_.operation_mode="normal"; -defparam dout_1_2_a_x_31_.output_mode="comb_only"; -defparam dout_1_2_a_x_31_.lut_mask="1b1b"; -defparam dout_1_2_a_x_31_.synch_mode="off"; -defparam dout_1_2_a_x_31_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_a_x_30_ ( - .combout(dout_1_2_a_x[30]), - .dataa(dout22), - .datab(dout_2_30), - .datac(dout_2_14), +defparam dout_1_2_26_.operation_mode="normal"; +defparam dout_1_2_26_.output_mode="comb_only"; +defparam dout_1_2_26_.lut_mask="4e4e"; +defparam dout_1_2_26_.synch_mode="off"; +defparam dout_1_2_26_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_a_26_ ( + .combout(dout_1_2_a[26]), + .dataa(dmem_ctl_o_0), + .datab(dout_2_26), + .datac(dout_2_10), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2422,17 +2380,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_a_x_30_.operation_mode="normal"; -defparam dout_1_2_a_x_30_.output_mode="comb_only"; -defparam dout_1_2_a_x_30_.lut_mask="1b1b"; -defparam dout_1_2_a_x_30_.synch_mode="off"; -defparam dout_1_2_a_x_30_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_a_x_29_ ( - .combout(dout_1_2_a_x[29]), - .dataa(dout22), - .datab(dout_2_29), - .datac(dout_2_13), +defparam dout_1_2_a_26_.operation_mode="normal"; +defparam dout_1_2_a_26_.output_mode="comb_only"; +defparam dout_1_2_a_26_.lut_mask="1b1b"; +defparam dout_1_2_a_26_.synch_mode="off"; +defparam dout_1_2_a_26_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_28_ ( + .combout(dout_1_2_4), + .dataa(dmem_ctl_o_1), + .datab(dout_2_4), + .datac(dout_1_2_a[28]), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2442,15 +2400,15 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_a_x_29_.operation_mode="normal"; -defparam dout_1_2_a_x_29_.output_mode="comb_only"; -defparam dout_1_2_a_x_29_.lut_mask="1b1b"; -defparam dout_1_2_a_x_29_.synch_mode="off"; -defparam dout_1_2_a_x_29_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_a_x_28_ ( - .combout(dout_1_2_a_x[28]), - .dataa(dout22), +defparam dout_1_2_28_.operation_mode="normal"; +defparam dout_1_2_28_.output_mode="comb_only"; +defparam dout_1_2_28_.lut_mask="4e4e"; +defparam dout_1_2_28_.synch_mode="off"; +defparam dout_1_2_28_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_a_28_ ( + .combout(dout_1_2_a[28]), + .dataa(dmem_ctl_o_0), .datab(dout_2_28), .datac(dout_2_12), .datad(VCC), @@ -2462,17 +2420,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_a_x_28_.operation_mode="normal"; -defparam dout_1_2_a_x_28_.output_mode="comb_only"; -defparam dout_1_2_a_x_28_.lut_mask="1b1b"; -defparam dout_1_2_a_x_28_.synch_mode="off"; -defparam dout_1_2_a_x_28_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_a_x_27_ ( - .combout(dout_1_2_a_x[27]), - .dataa(dout22), - .datab(dout_2_27), - .datac(dout_2_11), +defparam dout_1_2_a_28_.operation_mode="normal"; +defparam dout_1_2_a_28_.output_mode="comb_only"; +defparam dout_1_2_a_28_.lut_mask="1b1b"; +defparam dout_1_2_a_28_.synch_mode="off"; +defparam dout_1_2_a_28_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_30_ ( + .combout(dout_1_2_6), + .dataa(dmem_ctl_o_1), + .datab(dout_2_6), + .datac(dout_1_2_a[30]), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2482,17 +2440,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_a_x_27_.operation_mode="normal"; -defparam dout_1_2_a_x_27_.output_mode="comb_only"; -defparam dout_1_2_a_x_27_.lut_mask="1b1b"; -defparam dout_1_2_a_x_27_.synch_mode="off"; -defparam dout_1_2_a_x_27_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_a_x_26_ ( - .combout(dout_1_2_a_x[26]), - .dataa(dout22), - .datab(dout_2_26), - .datac(dout_2_10), +defparam dout_1_2_30_.operation_mode="normal"; +defparam dout_1_2_30_.output_mode="comb_only"; +defparam dout_1_2_30_.lut_mask="4e4e"; +defparam dout_1_2_30_.synch_mode="off"; +defparam dout_1_2_30_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_a_30_ ( + .combout(dout_1_2_a[30]), + .dataa(dmem_ctl_o_0), + .datab(dout_2_30), + .datac(dout_2_14), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2502,17 +2460,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_a_x_26_.operation_mode="normal"; -defparam dout_1_2_a_x_26_.output_mode="comb_only"; -defparam dout_1_2_a_x_26_.lut_mask="1b1b"; -defparam dout_1_2_a_x_26_.synch_mode="off"; -defparam dout_1_2_a_x_26_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_a_x_25_ ( - .combout(dout_1_2_a_x[25]), - .dataa(dout22), - .datab(dout_2_25), - .datac(dout_2_9), +defparam dout_1_2_a_30_.operation_mode="normal"; +defparam dout_1_2_a_30_.output_mode="comb_only"; +defparam dout_1_2_a_30_.lut_mask="1b1b"; +defparam dout_1_2_a_30_.synch_mode="off"; +defparam dout_1_2_a_30_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_31_ ( + .combout(dout_1_2_7), + .dataa(dmem_ctl_o_1), + .datab(dout_2_7), + .datac(dout_1_2_a[31]), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2522,17 +2480,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_a_x_25_.operation_mode="normal"; -defparam dout_1_2_a_x_25_.output_mode="comb_only"; -defparam dout_1_2_a_x_25_.lut_mask="1b1b"; -defparam dout_1_2_a_x_25_.synch_mode="off"; -defparam dout_1_2_a_x_25_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_a_x_24_ ( - .combout(dout_1_2_a_x[24]), - .dataa(dout22), - .datab(dout_2_24), - .datac(dout_2_8), +defparam dout_1_2_31_.operation_mode="normal"; +defparam dout_1_2_31_.output_mode="comb_only"; +defparam dout_1_2_31_.lut_mask="4e4e"; +defparam dout_1_2_31_.synch_mode="off"; +defparam dout_1_2_31_.sum_lutc_input="datac"; +// @13:202 + cyclone_lcell dout_1_2_a_31_ ( + .combout(dout_1_2_a[31]), + .dataa(dmem_ctl_o_0), + .datab(dout_2_31), + .datac(dout_2_15), .datad(VCC), .aclr(GND), .sclr(GND), @@ -2542,18 +2500,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_a_x_24_.operation_mode="normal"; -defparam dout_1_2_a_x_24_.output_mode="comb_only"; -defparam dout_1_2_a_x_24_.lut_mask="1b1b"; -defparam dout_1_2_a_x_24_.synch_mode="off"; -defparam dout_1_2_a_x_24_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_24_ ( - .combout(dout_1_2_0), - .dataa(dout22), - .datab(dout21), - .datac(dout_2_0), - .datad(dout_1_2_a_x[24]), +defparam dout_1_2_a_31_.operation_mode="normal"; +defparam dout_1_2_a_31_.output_mode="comb_only"; +defparam dout_1_2_a_31_.lut_mask="1b1b"; +defparam dout_1_2_a_31_.synch_mode="off"; +defparam dout_1_2_a_31_.sum_lutc_input="datac"; +// @13:207 + cyclone_lcell dout_1_23_ ( + .combout(dout_1_15), + .dataa(dmem_ctl_o_0), + .datab(dmem_ctl_o_1), + .datac(dout_2_23), + .datad(dout_2_7), .aclr(GND), .sclr(GND), .sload(GND), @@ -2562,18 +2520,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_24_.operation_mode="normal"; -defparam dout_1_2_24_.output_mode="comb_only"; -defparam dout_1_2_24_.lut_mask="40fb"; -defparam dout_1_2_24_.synch_mode="off"; -defparam dout_1_2_24_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_25_ ( - .combout(dout_1_2_1), - .dataa(dout22), - .datab(dout21), - .datac(dout_2_1), - .datad(dout_1_2_a_x[25]), +defparam dout_1_23_.operation_mode="normal"; +defparam dout_1_23_.output_mode="comb_only"; +defparam dout_1_23_.lut_mask="fb40"; +defparam dout_1_23_.synch_mode="off"; +defparam dout_1_23_.sum_lutc_input="datac"; +// @13:207 + cyclone_lcell dout_1_22_ ( + .combout(dout_1_14), + .dataa(dmem_ctl_o_0), + .datab(dmem_ctl_o_1), + .datac(dout_2_22), + .datad(dout_2_6), .aclr(GND), .sclr(GND), .sload(GND), @@ -2582,58 +2540,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_25_.operation_mode="normal"; -defparam dout_1_2_25_.output_mode="comb_only"; -defparam dout_1_2_25_.lut_mask="40fb"; -defparam dout_1_2_25_.synch_mode="off"; -defparam dout_1_2_25_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_26_ ( - .combout(dout_1_2_2), - .dataa(dout22), - .datab(dout21), - .datac(dout_2_2), - .datad(dout_1_2_a_x[26]), - .aclr(GND), - .sclr(GND), - .sload(GND), - .ena(VCC), - .inverta(GND), - .aload(GND), - .regcascin(GND) -); -defparam dout_1_2_26_.operation_mode="normal"; -defparam dout_1_2_26_.output_mode="comb_only"; -defparam dout_1_2_26_.lut_mask="40fb"; -defparam dout_1_2_26_.synch_mode="off"; -defparam dout_1_2_26_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_27_ ( - .combout(dout_1_2_3), - .dataa(dout22), - .datab(dout21), - .datac(dout_2_3), - .datad(dout_1_2_a_x[27]), - .aclr(GND), - .sclr(GND), - .sload(GND), - .ena(VCC), - .inverta(GND), - .aload(GND), - .regcascin(GND) -); -defparam dout_1_2_27_.operation_mode="normal"; -defparam dout_1_2_27_.output_mode="comb_only"; -defparam dout_1_2_27_.lut_mask="40fb"; -defparam dout_1_2_27_.synch_mode="off"; -defparam dout_1_2_27_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_28_ ( - .combout(dout_1_2_4), - .dataa(dout22), - .datab(dout21), - .datac(dout_2_4), - .datad(dout_1_2_a_x[28]), +defparam dout_1_22_.operation_mode="normal"; +defparam dout_1_22_.output_mode="comb_only"; +defparam dout_1_22_.lut_mask="fb40"; +defparam dout_1_22_.synch_mode="off"; +defparam dout_1_22_.sum_lutc_input="datac"; +// @13:207 + cyclone_lcell dout_1_21_ ( + .combout(dout_1_13), + .dataa(dmem_ctl_o_0), + .datab(dmem_ctl_o_1), + .datac(dout_2_21), + .datad(dout_2_5), .aclr(GND), .sclr(GND), .sload(GND), @@ -2642,18 +2560,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_28_.operation_mode="normal"; -defparam dout_1_2_28_.output_mode="comb_only"; -defparam dout_1_2_28_.lut_mask="40fb"; -defparam dout_1_2_28_.synch_mode="off"; -defparam dout_1_2_28_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_29_ ( - .combout(dout_1_2_5), - .dataa(dout22), - .datab(dout21), - .datac(dout_2_5), - .datad(dout_1_2_a_x[29]), +defparam dout_1_21_.operation_mode="normal"; +defparam dout_1_21_.output_mode="comb_only"; +defparam dout_1_21_.lut_mask="fb40"; +defparam dout_1_21_.synch_mode="off"; +defparam dout_1_21_.sum_lutc_input="datac"; +// @13:207 + cyclone_lcell dout_1_20_ ( + .combout(dout_1_12), + .dataa(dmem_ctl_o_0), + .datab(dmem_ctl_o_1), + .datac(dout_2_20), + .datad(dout_2_4), .aclr(GND), .sclr(GND), .sload(GND), @@ -2662,18 +2580,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_29_.operation_mode="normal"; -defparam dout_1_2_29_.output_mode="comb_only"; -defparam dout_1_2_29_.lut_mask="40fb"; -defparam dout_1_2_29_.synch_mode="off"; -defparam dout_1_2_29_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_30_ ( - .combout(dout_1_2_6), - .dataa(dout22), - .datab(dout21), - .datac(dout_2_6), - .datad(dout_1_2_a_x[30]), +defparam dout_1_20_.operation_mode="normal"; +defparam dout_1_20_.output_mode="comb_only"; +defparam dout_1_20_.lut_mask="fb40"; +defparam dout_1_20_.synch_mode="off"; +defparam dout_1_20_.sum_lutc_input="datac"; +// @13:207 + cyclone_lcell dout_1_19_ ( + .combout(dout_1_11), + .dataa(dmem_ctl_o_0), + .datab(dmem_ctl_o_1), + .datac(dout_2_19), + .datad(dout_2_3), .aclr(GND), .sclr(GND), .sload(GND), @@ -2682,18 +2600,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_30_.operation_mode="normal"; -defparam dout_1_2_30_.output_mode="comb_only"; -defparam dout_1_2_30_.lut_mask="40fb"; -defparam dout_1_2_30_.synch_mode="off"; -defparam dout_1_2_30_.sum_lutc_input="datac"; -// @13:224 - cyclone_lcell dout_1_2_31_ ( - .combout(dout_1_2_7), - .dataa(dout22), - .datab(dout21), - .datac(dout_2_7), - .datad(dout_1_2_a_x[31]), +defparam dout_1_19_.operation_mode="normal"; +defparam dout_1_19_.output_mode="comb_only"; +defparam dout_1_19_.lut_mask="fb40"; +defparam dout_1_19_.synch_mode="off"; +defparam dout_1_19_.sum_lutc_input="datac"; +// @13:207 + cyclone_lcell dout_1_18_ ( + .combout(dout_1_10), + .dataa(dmem_ctl_o_0), + .datab(dmem_ctl_o_1), + .datac(dout_2_18), + .datad(dout_2_2), .aclr(GND), .sclr(GND), .sload(GND), @@ -2702,18 +2620,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_2_31_.operation_mode="normal"; -defparam dout_1_2_31_.output_mode="comb_only"; -defparam dout_1_2_31_.lut_mask="40fb"; -defparam dout_1_2_31_.synch_mode="off"; -defparam dout_1_2_31_.sum_lutc_input="datac"; -// @13:225 - cyclone_lcell dout21_cZ ( - .combout(dout21), - .dataa(dmem_ctl_o_3), - .datab(dmem_ctl_o_0), - .datac(dmem_ctl_o_2), - .datad(dmem_ctl_o_1), +defparam dout_1_18_.operation_mode="normal"; +defparam dout_1_18_.output_mode="comb_only"; +defparam dout_1_18_.lut_mask="fb40"; +defparam dout_1_18_.synch_mode="off"; +defparam dout_1_18_.sum_lutc_input="datac"; +// @13:207 + cyclone_lcell dout_1_17_ ( + .combout(dout_1_9), + .dataa(dmem_ctl_o_0), + .datab(dmem_ctl_o_1), + .datac(dout_2_17), + .datad(dout_2_1), .aclr(GND), .sclr(GND), .sload(GND), @@ -2722,18 +2640,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout21_cZ.operation_mode="normal"; -defparam dout21_cZ.output_mode="comb_only"; -defparam dout21_cZ.lut_mask="0004"; -defparam dout21_cZ.synch_mode="off"; -defparam dout21_cZ.sum_lutc_input="datac"; -// @13:227 - cyclone_lcell dout22_cZ ( - .combout(dout22), - .dataa(dmem_ctl_o_3), - .datab(dmem_ctl_o_0), - .datac(dmem_ctl_o_2), - .datad(dmem_ctl_o_1), +defparam dout_1_17_.operation_mode="normal"; +defparam dout_1_17_.output_mode="comb_only"; +defparam dout_1_17_.lut_mask="fb40"; +defparam dout_1_17_.synch_mode="off"; +defparam dout_1_17_.sum_lutc_input="datac"; +// @13:207 + cyclone_lcell dout_1_16_ ( + .combout(dout_1_8), + .dataa(dmem_ctl_o_0), + .datab(dmem_ctl_o_1), + .datac(dout_2_16), + .datad(dout_2_0), .aclr(GND), .sclr(GND), .sload(GND), @@ -2742,18 +2660,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout22_cZ.operation_mode="normal"; -defparam dout22_cZ.output_mode="comb_only"; -defparam dout22_cZ.lut_mask="4000"; -defparam dout22_cZ.synch_mode="off"; -defparam dout22_cZ.sum_lutc_input="datac"; -// @13:1 - cyclone_lcell dout_1_23_ ( +defparam dout_1_16_.operation_mode="normal"; +defparam dout_1_16_.output_mode="comb_only"; +defparam dout_1_16_.lut_mask="fb40"; +defparam dout_1_16_.synch_mode="off"; +defparam dout_1_16_.sum_lutc_input="datac"; +// @13:195 + cyclone_lcell dout_1_15_ ( .combout(dout_1_7), - .dataa(dout21), - .datab(dout22), - .datac(dout_2_23), - .datad(dout_2_7), + .dataa(dmem_ctl_o_1), + .datab(dout_2_15), + .datac(dout_2_7), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2762,18 +2680,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_23_.operation_mode="normal"; -defparam dout_1_23_.output_mode="comb_only"; -defparam dout_1_23_.lut_mask="fe10"; -defparam dout_1_23_.synch_mode="off"; -defparam dout_1_23_.sum_lutc_input="datac"; -// @13:1 - cyclone_lcell dout_1_22_ ( +defparam dout_1_15_.operation_mode="normal"; +defparam dout_1_15_.output_mode="comb_only"; +defparam dout_1_15_.lut_mask="d8d8"; +defparam dout_1_15_.synch_mode="off"; +defparam dout_1_15_.sum_lutc_input="datac"; +// @13:195 + cyclone_lcell dout_1_14_ ( .combout(dout_1_6), - .dataa(dout21), - .datab(dout22), - .datac(dout_2_22), - .datad(dout_2_6), + .dataa(dmem_ctl_o_1), + .datab(dout_2_14), + .datac(dout_2_6), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2782,18 +2700,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_22_.operation_mode="normal"; -defparam dout_1_22_.output_mode="comb_only"; -defparam dout_1_22_.lut_mask="fe10"; -defparam dout_1_22_.synch_mode="off"; -defparam dout_1_22_.sum_lutc_input="datac"; -// @13:1 - cyclone_lcell dout_1_21_ ( +defparam dout_1_14_.operation_mode="normal"; +defparam dout_1_14_.output_mode="comb_only"; +defparam dout_1_14_.lut_mask="d8d8"; +defparam dout_1_14_.synch_mode="off"; +defparam dout_1_14_.sum_lutc_input="datac"; +// @13:195 + cyclone_lcell dout_1_13_ ( .combout(dout_1_5), - .dataa(dout21), - .datab(dout22), - .datac(dout_2_21), - .datad(dout_2_5), + .dataa(dmem_ctl_o_1), + .datab(dout_2_13), + .datac(dout_2_5), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2802,18 +2720,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_21_.operation_mode="normal"; -defparam dout_1_21_.output_mode="comb_only"; -defparam dout_1_21_.lut_mask="fe10"; -defparam dout_1_21_.synch_mode="off"; -defparam dout_1_21_.sum_lutc_input="datac"; -// @13:1 - cyclone_lcell dout_1_20_ ( +defparam dout_1_13_.operation_mode="normal"; +defparam dout_1_13_.output_mode="comb_only"; +defparam dout_1_13_.lut_mask="d8d8"; +defparam dout_1_13_.synch_mode="off"; +defparam dout_1_13_.sum_lutc_input="datac"; +// @13:195 + cyclone_lcell dout_1_12_ ( .combout(dout_1_4), - .dataa(dout21), - .datab(dout22), - .datac(dout_2_20), - .datad(dout_2_4), + .dataa(dmem_ctl_o_1), + .datab(dout_2_12), + .datac(dout_2_4), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2822,18 +2740,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_20_.operation_mode="normal"; -defparam dout_1_20_.output_mode="comb_only"; -defparam dout_1_20_.lut_mask="fe10"; -defparam dout_1_20_.synch_mode="off"; -defparam dout_1_20_.sum_lutc_input="datac"; -// @13:1 - cyclone_lcell dout_1_19_ ( +defparam dout_1_12_.operation_mode="normal"; +defparam dout_1_12_.output_mode="comb_only"; +defparam dout_1_12_.lut_mask="d8d8"; +defparam dout_1_12_.synch_mode="off"; +defparam dout_1_12_.sum_lutc_input="datac"; +// @13:195 + cyclone_lcell dout_1_11_ ( .combout(dout_1_3), - .dataa(dout21), - .datab(dout22), - .datac(dout_2_19), - .datad(dout_2_3), + .dataa(dmem_ctl_o_1), + .datab(dout_2_11), + .datac(dout_2_3), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2842,18 +2760,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_19_.operation_mode="normal"; -defparam dout_1_19_.output_mode="comb_only"; -defparam dout_1_19_.lut_mask="fe10"; -defparam dout_1_19_.synch_mode="off"; -defparam dout_1_19_.sum_lutc_input="datac"; -// @13:1 - cyclone_lcell dout_1_18_ ( +defparam dout_1_11_.operation_mode="normal"; +defparam dout_1_11_.output_mode="comb_only"; +defparam dout_1_11_.lut_mask="d8d8"; +defparam dout_1_11_.synch_mode="off"; +defparam dout_1_11_.sum_lutc_input="datac"; +// @13:195 + cyclone_lcell dout_1_10_ ( .combout(dout_1_2), - .dataa(dout21), - .datab(dout22), - .datac(dout_2_18), - .datad(dout_2_2), + .dataa(dmem_ctl_o_1), + .datab(dout_2_10), + .datac(dout_2_2), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2862,18 +2780,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_18_.operation_mode="normal"; -defparam dout_1_18_.output_mode="comb_only"; -defparam dout_1_18_.lut_mask="fe10"; -defparam dout_1_18_.synch_mode="off"; -defparam dout_1_18_.sum_lutc_input="datac"; -// @13:1 - cyclone_lcell dout_1_17_ ( +defparam dout_1_10_.operation_mode="normal"; +defparam dout_1_10_.output_mode="comb_only"; +defparam dout_1_10_.lut_mask="d8d8"; +defparam dout_1_10_.synch_mode="off"; +defparam dout_1_10_.sum_lutc_input="datac"; +// @13:195 + cyclone_lcell dout_1_9_ ( .combout(dout_1_1), - .dataa(dout21), - .datab(dout22), - .datac(dout_2_17), - .datad(dout_2_1), + .dataa(dmem_ctl_o_1), + .datab(dout_2_9), + .datac(dout_2_1), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2882,18 +2800,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_17_.operation_mode="normal"; -defparam dout_1_17_.output_mode="comb_only"; -defparam dout_1_17_.lut_mask="fe10"; -defparam dout_1_17_.synch_mode="off"; -defparam dout_1_17_.sum_lutc_input="datac"; -// @13:1 - cyclone_lcell dout_1_16_ ( +defparam dout_1_9_.operation_mode="normal"; +defparam dout_1_9_.output_mode="comb_only"; +defparam dout_1_9_.lut_mask="d8d8"; +defparam dout_1_9_.synch_mode="off"; +defparam dout_1_9_.sum_lutc_input="datac"; +// @13:195 + cyclone_lcell dout_1_8_ ( .combout(dout_1_0), - .dataa(dout21), - .datab(dout22), - .datac(dout_2_16), - .datad(dout_2_0), + .dataa(dmem_ctl_o_1), + .datab(dout_2_8), + .datac(dout_2_0), + .datad(VCC), .aclr(GND), .sclr(GND), .sload(GND), @@ -2902,36 +2820,36 @@ .aload(GND), .regcascin(GND) ); -defparam dout_1_16_.operation_mode="normal"; -defparam dout_1_16_.output_mode="comb_only"; -defparam dout_1_16_.lut_mask="fe10"; -defparam dout_1_16_.synch_mode="off"; -defparam dout_1_16_.sum_lutc_input="datac"; +defparam dout_1_8_.operation_mode="normal"; +defparam dout_1_8_.output_mode="comb_only"; +defparam dout_1_8_.lut_mask="d8d8"; +defparam dout_1_8_.synch_mode="off"; +defparam dout_1_8_.sum_lutc_input="datac"; endmodule /* mem_din_ctl */ // VQM4.1+ module mem_dout_ctl ( - dout_0_a6_3, - dout_0_a6_0_d0, + dout_0_a6_2, + dout_0_a6_0, + dout_0_0_a6_0_0_0, + dout_0_a_0, + dout_0_a_2, + dout_0_a_8, + dout_0_a_10, + dout_0_0_a6_1_0, + dout_0_0_a2_0_8, + dout_0_0_a2_0_0, + dout_0_0_a6_0_16, + dout_0_0_a6_0_1, dout_0_0_a6_6, dout_0_0_a6_5, - dout_0_0_a6_3, + dout_0_0_a6_4, dout_0_0_a6_2, - dout_0_0_a6_0, - dout_0_0_a_14, - dout_0_0_a_0, - dout_0_0_a_2, - dout_0_0_a_3, - dout_0_0_a_5, - dout_0_0_a_6, - dout_0_a2_0_0, - dout_0_0_a2_1_0, - dout_0_a6_0_0, - dout_i_i_a6_0_0, - dout_i_i_a6_1_0, - dout_i_i_0_0, - dout_i_i_0_8, - dout_i_i_0_16, + dout_0_0_a6_0_d0, + dout_0_0_a6_16, + dout_0_0_0_8, + dout_0_0_0_0, + dout_0_0_a2_7, data2core_6, data2core_5, data2core_4, @@ -2939,72 +2857,71 @@ data2core_2, data2core_1, data2core_0, - data2core_16, data2core_17, data2core_18, data2core_19, - data2core_12, data2core_20, - data2core_13, data2core_21, - data2core_14, data2core_22, - data2core_8, data2core_9, data2core_10, data2core_11, - data2core_15, - data2core_23, + data2core_12, + data2core_13, + data2core_14, + data2core_8, + data2core_16, data2core_31, + data2core_23, + data2core_15, data2core_7, - dout_0_a2_2_0, - dout_0_0_0, - dout_0_a2_3_0, - dout_0_a2_1_0, - dout_0_o2_0_0, - dout_i_i_a_3, - dout_i_i_a_0, - dout_i_i_a_1, - dout_i_i_a_5, - dout_i_i_a_13, - dout_i_i_a_21, - dout_i_i_0, + dout_0_0_a2_1_8, + dout_0_0_a2_1_7, + dout_0_0_1_8, + dout_0_0_1_0, + dout_0_0_o6_7, + dout_0_0_o6_0_0, + r32_o_1, + r32_o_0, ctl_o_3, - ctl_o_0, ctl_o_1, + ctl_o_0, ctl_o_2, - dout_i_i_a6_0, - dout_0_o2_0, - byte_addr_o_1, - byte_addr_o_0, - dout_0_a_11, - dout_0_a_0, - dout_0_a_3, - dout_0_a_7, - dout_0_a_8, - dout_0_a_6 -); -output dout_0_a6_3 ; -output dout_0_a6_0_d0 ; + dout_0_0_a_2, + dout_0_0_a_4, + dout_0_0_a_5, + dout_0_0_a_6, + dout_0_0_a_8, + dout_0_0_a_10, + dout_0_0_a_12, + dout_0_0_a_13, + dout_0_0_a_14, + dout_0_0_a_0, + dout_0_0_a_15, + dout_0_0_a_31, + dout_0_0_a_23 +); +output dout_0_a6_2 ; +output dout_0_a6_0 ; +output dout_0_0_a6_0_0_0 ; +output dout_0_a_0 ; +output dout_0_a_2 ; +output dout_0_a_8 ; +output dout_0_a_10 ; +output dout_0_0_a6_1_0 ; +output dout_0_0_a2_0_8 ; +output dout_0_0_a2_0_0 ; +output dout_0_0_a6_0_16 ; +output dout_0_0_a6_0_1 ; output dout_0_0_a6_6 ; output dout_0_0_a6_5 ; -output dout_0_0_a6_3 ; +output dout_0_0_a6_4 ; output dout_0_0_a6_2 ; -output dout_0_0_a6_0 ; -output dout_0_0_a_14 ; -output dout_0_0_a_0 ; -output dout_0_0_a_2 ; -output dout_0_0_a_3 ; -output dout_0_0_a_5 ; -output dout_0_0_a_6 ; -output dout_0_a2_0_0 ; -output dout_0_0_a2_1_0 ; -output dout_0_a6_0_0 ; -output dout_i_i_a6_0_0 ; -output dout_i_i_a6_1_0 ; -output dout_i_i_0_0 ; -output dout_i_i_0_8 ; -output dout_i_i_0_16 ; +output dout_0_0_a6_0_d0 ; +output dout_0_0_a6_16 ; +output dout_0_0_0_8 ; +output dout_0_0_0_0 ; +output dout_0_0_a2_7 ; input data2core_6 ; input data2core_5 ; input data2core_4 ; @@ -3012,71 +2929,70 @@ input data2core_2 ; input data2core_1 ; input data2core_0 ; -input data2core_16 ; input data2core_17 ; input data2core_18 ; input data2core_19 ; -input data2core_12 ; input data2core_20 ; -input data2core_13 ; input data2core_21 ; -input data2core_14 ; input data2core_22 ; -input data2core_8 ; input data2core_9 ; input data2core_10 ; input data2core_11 ; -input data2core_15 ; -input data2core_23 ; +input data2core_12 ; +input data2core_13 ; +input data2core_14 ; +input data2core_8 ; +input data2core_16 ; input data2core_31 ; +input data2core_23 ; +input data2core_15 ; input data2core_7 ; -output dout_0_a2_2_0 ; -output dout_0_0_0 ; -output dout_0_a2_3_0 ; -output dout_0_a2_1_0 ; -output dout_0_o2_0_0 ; -output dout_i_i_a_3 ; -output dout_i_i_a_0 ; -output dout_i_i_a_1 ; -output dout_i_i_a_5 ; -output dout_i_i_a_13 ; -output dout_i_i_a_21 ; -input dout_i_i_0 ; +output dout_0_0_a2_1_8 ; +output dout_0_0_a2_1_7 ; +output dout_0_0_1_8 ; +output dout_0_0_1_0 ; +output dout_0_0_o6_7 ; +output dout_0_0_o6_0_0 ; +input r32_o_1 ; +input r32_o_0 ; input ctl_o_3 ; -input ctl_o_0 ; input ctl_o_1 ; +input ctl_o_0 ; input ctl_o_2 ; -output dout_i_i_a6_0 ; -output dout_0_o2_0 ; -input byte_addr_o_1 ; -input byte_addr_o_0 ; -output dout_0_a_11 ; -output dout_0_a_0 ; -output dout_0_a_3 ; -output dout_0_a_7 ; -output dout_0_a_8 ; -output dout_0_a_6 ; -wire dout_0_a6_3 ; -wire dout_0_a6_0_d0 ; +output dout_0_0_a_2 ; +output dout_0_0_a_4 ; +output dout_0_0_a_5 ; +output dout_0_0_a_6 ; +output dout_0_0_a_8 ; +output dout_0_0_a_10 ; +output dout_0_0_a_12 ; +output dout_0_0_a_13 ; +output dout_0_0_a_14 ; +output dout_0_0_a_0 ; +output dout_0_0_a_15 ; +output dout_0_0_a_31 ; +output dout_0_0_a_23 ; +wire dout_0_a6_2 ; +wire dout_0_a6_0 ; +wire dout_0_0_a6_0_0_0 ; +wire dout_0_a_0 ; +wire dout_0_a_2 ; +wire dout_0_a_8 ; +wire dout_0_a_10 ; +wire dout_0_0_a6_1_0 ; +wire dout_0_0_a2_0_8 ; +wire dout_0_0_a2_0_0 ; +wire dout_0_0_a6_0_16 ; +wire dout_0_0_a6_0_1 ; wire dout_0_0_a6_6 ; wire dout_0_0_a6_5 ; -wire dout_0_0_a6_3 ; +wire dout_0_0_a6_4 ; wire dout_0_0_a6_2 ; -wire dout_0_0_a6_0 ; -wire dout_0_0_a_14 ; -wire dout_0_0_a_0 ; -wire dout_0_0_a_2 ; -wire dout_0_0_a_3 ; -wire dout_0_0_a_5 ; -wire dout_0_0_a_6 ; -wire dout_0_a2_0_0 ; -wire dout_0_0_a2_1_0 ; -wire dout_0_a6_0_0 ; -wire dout_i_i_a6_0_0 ; -wire dout_i_i_a6_1_0 ; -wire dout_i_i_0_0 ; -wire dout_i_i_0_8 ; -wire dout_i_i_0_16 ; +wire dout_0_0_a6_0_d0 ; +wire dout_0_0_a6_16 ; +wire dout_0_0_0_8 ; +wire dout_0_0_0_0 ; +wire dout_0_0_a2_7 ; wire data2core_6 ; wire data2core_5 ; wire data2core_4 ; @@ -3084,71 +3000,75 @@ wire data2core_2 ; wire data2core_1 ; wire data2core_0 ; -wire data2core_16 ; wire data2core_17 ; wire data2core_18 ; wire data2core_19 ; -wire data2core_12 ; wire data2core_20 ; -wire data2core_13 ; wire data2core_21 ; -wire data2core_14 ; wire data2core_22 ; -wire data2core_8 ; wire data2core_9 ; wire data2core_10 ; wire data2core_11 ; -wire data2core_15 ; -wire data2core_23 ; +wire data2core_12 ; +wire data2core_13 ; +wire data2core_14 ; +wire data2core_8 ; +wire data2core_16 ; wire data2core_31 ; +wire data2core_23 ; +wire data2core_15 ; wire data2core_7 ; -wire dout_0_a2_2_0 ; -wire dout_0_0_0 ; -wire dout_0_a2_3_0 ; -wire dout_0_a2_1_0 ; -wire dout_0_o2_0_0 ; -wire dout_i_i_a_3 ; -wire dout_i_i_a_0 ; -wire dout_i_i_a_1 ; -wire dout_i_i_a_5 ; -wire dout_i_i_a_13 ; -wire dout_i_i_a_21 ; -wire dout_i_i_0 ; +wire dout_0_0_a2_1_8 ; +wire dout_0_0_a2_1_7 ; +wire dout_0_0_1_8 ; +wire dout_0_0_1_0 ; +wire dout_0_0_o6_7 ; +wire dout_0_0_o6_0_0 ; +wire r32_o_1 ; +wire r32_o_0 ; wire ctl_o_3 ; -wire ctl_o_0 ; wire ctl_o_1 ; +wire ctl_o_0 ; wire ctl_o_2 ; -wire dout_i_i_a6_0 ; -wire dout_0_o2_0 ; -wire byte_addr_o_1 ; -wire byte_addr_o_0 ; -wire dout_0_a_11 ; -wire dout_0_a_0 ; -wire dout_0_a_3 ; -wire dout_0_a_7 ; -wire dout_0_a_8 ; -wire dout_0_a_6 ; -wire [7:7] dout_0_a6_0_1; -wire [7:7] dout_0_a2_5; -wire [7:7] dout_0_0_a; -wire [8:7] dout_0_a2; -wire [31:15] dout_i_i_0_a; -wire [0:0] dout_0_0_o2; -wire [7:7] dout_0_o2_1; +wire dout_0_0_a_2 ; +wire dout_0_0_a_4 ; +wire dout_0_0_a_5 ; +wire dout_0_0_a_6 ; +wire dout_0_0_a_8 ; +wire dout_0_0_a_10 ; +wire dout_0_0_a_12 ; +wire dout_0_0_a_13 ; +wire dout_0_0_a_14 ; +wire dout_0_0_a_0 ; +wire dout_0_0_a_15 ; +wire dout_0_0_a_31 ; +wire dout_0_0_a_23 ; +wire [7:7] dout_0_0_a6_0; +wire [7:7] dout_0_0_a6; +wire [31:23] dout_0_0_0_a; +wire [15:15] dout_0_0_a6_3_1; +wire [15:15] dout_0_0_1_a; +wire [23:7] dout_0_0_a6_0_a; wire [0:0] dout_0_0_a2_2; -wire [8:8] dout_0_a2_a; -wire [0:0] dout_0_0_a2_0; +wire [0:0] dout_0_0_a2_2_a; +wire [16:7] dout_0_0_a6_a; +wire [8:8] dout_0_0_a2; +wire [8:8] dout_0_0_a2_a; +wire [7:7] dout_0_0_a2_0_0_Z; +wire [0:0] dout_0_0_a2_1; +wire [0:0] dout_0_0_o6; +wire [15:15] dout_0_0_a6_3_1_a; wire GND ; wire VCC ; assign VCC = 1'b1; assign GND = 1'b0; -// @13:177 - cyclone_lcell dout_0_a_7_ ( - .combout(dout_0_a_6), - .dataa(byte_addr_o_0), - .datab(dout_0_a6_0_1[7]), - .datac(dout_0_a2_5[7]), - .datad(dout_0_o2_0), +// @13:154 + cyclone_lcell dout_0_0_a_23_ ( + .combout(dout_0_0_a_23), + .dataa(ctl_o_2), + .datab(r32_o_0), + .datac(dout_0_0_o6_0_0), + .datad(dout_0_0_o6_7), .aclr(GND), .sclr(GND), .sload(GND), @@ -3157,18 +3077,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_0_a_7_.operation_mode="normal"; -defparam dout_0_a_7_.output_mode="comb_only"; -defparam dout_0_a_7_.lut_mask="3b7f"; -defparam dout_0_a_7_.synch_mode="off"; -defparam dout_0_a_7_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_a6_16_ ( - .combout(dout_i_i_a6_0), - .dataa(ctl_o_2), - .datab(dout_i_i_0), - .datac(VCC), - .datad(VCC), +defparam dout_0_0_a_23_.operation_mode="normal"; +defparam dout_0_0_a_23_.output_mode="comb_only"; +defparam dout_0_0_a_23_.lut_mask="5140"; +defparam dout_0_0_a_23_.synch_mode="off"; +defparam dout_0_0_a_23_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_1_7_ ( + .combout(dout_0_0_1_0), + .dataa(dout_0_0_a2_1_7), + .datab(data2core_7), + .datac(dout_0_0_a6_0[7]), + .datad(dout_0_0_a6[7]), .aclr(GND), .sclr(GND), .sload(GND), @@ -3177,18 +3097,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_a6_16_.operation_mode="normal"; -defparam dout_i_i_a6_16_.output_mode="comb_only"; -defparam dout_i_i_a6_16_.lut_mask="4444"; -defparam dout_i_i_a6_16_.synch_mode="off"; -defparam dout_i_i_a6_16_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_a_31_ ( - .combout(dout_i_i_a_21), - .dataa(byte_addr_o_0), - .datab(dout_0_o2_0_0), - .datac(dout_0_o2_0), - .datad(VCC), +defparam dout_0_0_1_7_.operation_mode="normal"; +defparam dout_0_0_1_7_.output_mode="comb_only"; +defparam dout_0_0_1_7_.lut_mask="fff8"; +defparam dout_0_0_1_7_.synch_mode="off"; +defparam dout_0_0_1_7_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a_31_ ( + .combout(dout_0_0_a_31), + .dataa(r32_o_0), + .datab(r32_o_1), + .datac(data2core_15), + .datad(dout_0_0_o6_0_0), .aclr(GND), .sclr(GND), .sload(GND), @@ -3197,18 +3117,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_a_31_.operation_mode="normal"; -defparam dout_i_i_a_31_.output_mode="comb_only"; -defparam dout_i_i_a_31_.lut_mask="2727"; -defparam dout_i_i_a_31_.synch_mode="off"; -defparam dout_i_i_a_31_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_a_23_ ( - .combout(dout_i_i_a_13), - .dataa(ctl_o_1), - .datab(byte_addr_o_0), - .datac(dout_0_a2_1_0), - .datad(dout_0_a2_3_0), +defparam dout_0_0_a_31_.operation_mode="normal"; +defparam dout_0_0_a_31_.output_mode="comb_only"; +defparam dout_0_0_a_31_.lut_mask="15bf"; +defparam dout_0_0_a_31_.synch_mode="off"; +defparam dout_0_0_a_31_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a_15_ ( + .combout(dout_0_0_a_15), + .dataa(ctl_o_2), + .datab(r32_o_0), + .datac(dout_0_0_a2_7), + .datad(dout_0_0_o6_0_0), .aclr(GND), .sclr(GND), .sload(GND), @@ -3217,18 +3137,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_a_23_.operation_mode="normal"; -defparam dout_i_i_a_23_.output_mode="comb_only"; -defparam dout_i_i_a_23_.lut_mask="7530"; -defparam dout_i_i_a_23_.synch_mode="off"; -defparam dout_i_i_a_23_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_a_15_ ( - .combout(dout_i_i_a_5), - .dataa(byte_addr_o_0), - .datab(dout_0_a2_1_0), - .datac(dout_0_o2_0_0), - .datad(dout_0_o2_0), +defparam dout_0_0_a_15_.operation_mode="normal"; +defparam dout_0_0_a_15_.output_mode="comb_only"; +defparam dout_0_0_a_15_.lut_mask="4000"; +defparam dout_0_0_a_15_.synch_mode="off"; +defparam dout_0_0_a_15_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_0_23_ ( + .combout(dout_0_0_0_0), + .dataa(dout_0_0_0_a[23]), + .datab(dout_0_0_a2_1_7), + .datac(data2core_23), + .datad(data2core_7), .aclr(GND), .sclr(GND), .sload(GND), @@ -3237,18 +3157,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_a_15_.operation_mode="normal"; -defparam dout_i_i_a_15_.output_mode="comb_only"; -defparam dout_i_i_a_15_.lut_mask="3b7f"; -defparam dout_i_i_a_15_.synch_mode="off"; -defparam dout_i_i_a_15_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_0_0_7_ ( - .combout(dout_0_0_0), - .dataa(byte_addr_o_0), - .datab(dout_0_0_a[7]), - .datac(dout_0_a2_2_0), - .datad(data2core_7), +defparam dout_0_0_0_23_.operation_mode="normal"; +defparam dout_0_0_0_23_.output_mode="comb_only"; +defparam dout_0_0_0_23_.lut_mask="eac0"; +defparam dout_0_0_0_23_.synch_mode="off"; +defparam dout_0_0_0_23_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_0_a_23_ ( + .combout(dout_0_0_0_a[23]), + .dataa(ctl_o_2), + .datab(r32_o_0), + .datac(r32_o_1), + .datad(dout_0_0_a2_7), .aclr(GND), .sclr(GND), .sload(GND), @@ -3257,18 +3177,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_0_0_7_.operation_mode="normal"; -defparam dout_0_0_7_.output_mode="comb_only"; -defparam dout_0_0_7_.lut_mask="f200"; -defparam dout_0_0_7_.synch_mode="off"; -defparam dout_0_0_7_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_0_0_a_7_ ( - .combout(dout_0_0_a[7]), - .dataa(ctl_o_2), - .datab(ctl_o_1), - .datac(byte_addr_o_1), - .datad(dout_0_a2[7]), +defparam dout_0_0_0_a_23_.operation_mode="normal"; +defparam dout_0_0_0_a_23_.output_mode="comb_only"; +defparam dout_0_0_0_a_23_.lut_mask="4000"; +defparam dout_0_0_0_a_23_.synch_mode="off"; +defparam dout_0_0_0_a_23_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_1_15_ ( + .combout(dout_0_0_1_8), + .dataa(dout_0_0_a6_3_1[15]), + .datab(dout_0_0_1_a[15]), + .datac(data2core_15), + .datad(data2core_31), .aclr(GND), .sclr(GND), .sload(GND), @@ -3277,18 +3197,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_0_0_a_7_.operation_mode="normal"; -defparam dout_0_0_a_7_.output_mode="comb_only"; -defparam dout_0_0_a_7_.lut_mask="1fff"; -defparam dout_0_0_a_7_.synch_mode="off"; -defparam dout_0_0_a_7_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_0_31_ ( - .combout(dout_i_i_0_16), - .dataa(byte_addr_o_0), - .datab(dout_i_i_0_a[31]), - .datac(dout_0_a2_2_0), - .datad(data2core_31), +defparam dout_0_0_1_15_.operation_mode="normal"; +defparam dout_0_0_1_15_.output_mode="comb_only"; +defparam dout_0_0_1_15_.lut_mask="ba30"; +defparam dout_0_0_1_15_.synch_mode="off"; +defparam dout_0_0_1_15_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_1_a_15_ ( + .combout(dout_0_0_1_a[15]), + .dataa(r32_o_0), + .datab(r32_o_1), + .datac(dout_0_0_a2_7), + .datad(dout_0_0_a2_1_7), .aclr(GND), .sclr(GND), .sload(GND), @@ -3297,18 +3217,38 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_0_31_.operation_mode="normal"; -defparam dout_i_i_0_31_.output_mode="comb_only"; -defparam dout_i_i_0_31_.lut_mask="f400"; -defparam dout_i_i_0_31_.synch_mode="off"; -defparam dout_i_i_0_31_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_0_a_31_ ( - .combout(dout_i_i_0_a[31]), +defparam dout_0_0_1_a_15_.operation_mode="normal"; +defparam dout_0_0_1_a_15_.output_mode="comb_only"; +defparam dout_0_0_1_a_15_.lut_mask="00bf"; +defparam dout_0_0_1_a_15_.synch_mode="off"; +defparam dout_0_0_1_a_15_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_0_7_ ( + .combout(dout_0_0_a6_0[7]), .dataa(ctl_o_0), + .datab(r32_o_0), + .datac(dout_0_0_a6_0_a[7]), + .datad(data2core_23), + .aclr(GND), + .sclr(GND), + .sload(GND), + .ena(VCC), + .inverta(GND), + .aload(GND), + .regcascin(GND) +); +defparam dout_0_0_a6_0_7_.operation_mode="normal"; +defparam dout_0_0_a6_0_7_.output_mode="comb_only"; +defparam dout_0_0_a6_0_7_.lut_mask="4000"; +defparam dout_0_0_a6_0_7_.synch_mode="off"; +defparam dout_0_0_a6_0_7_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_0_a_7_ ( + .combout(dout_0_0_a6_0_a[7]), + .dataa(ctl_o_1), .datab(ctl_o_3), - .datac(ctl_o_1), - .datad(byte_addr_o_1), + .datac(ctl_o_2), + .datad(r32_o_1), .aclr(GND), .sclr(GND), .sload(GND), @@ -3317,18 +3257,38 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_0_a_31_.operation_mode="normal"; -defparam dout_i_i_0_a_31_.output_mode="comb_only"; -defparam dout_i_i_0_a_31_.lut_mask="0010"; -defparam dout_i_i_0_a_31_.synch_mode="off"; -defparam dout_i_i_0_a_31_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_0_23_ ( - .combout(dout_i_i_0_8), - .dataa(byte_addr_o_0), - .datab(dout_i_i_0_a[31]), - .datac(dout_0_a2_2_0), - .datad(data2core_23), +defparam dout_0_0_a6_0_a_7_.operation_mode="normal"; +defparam dout_0_0_a6_0_a_7_.output_mode="comb_only"; +defparam dout_0_0_a6_0_a_7_.lut_mask="001a"; +defparam dout_0_0_a6_0_a_7_.synch_mode="off"; +defparam dout_0_0_a6_0_a_7_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a2_2_0_ ( + .combout(dout_0_0_a2_2[0]), + .dataa(ctl_o_3), + .datab(r32_o_0), + .datac(r32_o_1), + .datad(dout_0_0_a2_2_a[0]), + .aclr(GND), + .sclr(GND), + .sload(GND), + .ena(VCC), + .inverta(GND), + .aload(GND), + .regcascin(GND) +); +defparam dout_0_0_a2_2_0_.operation_mode="normal"; +defparam dout_0_0_a2_2_0_.output_mode="comb_only"; +defparam dout_0_0_a2_2_0_.lut_mask="0e00"; +defparam dout_0_0_a2_2_0_.synch_mode="off"; +defparam dout_0_0_a2_2_0_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a2_2_a_0_ ( + .combout(dout_0_0_a2_2_a[0]), + .dataa(ctl_o_1), + .datab(ctl_o_0), + .datac(ctl_o_3), + .datad(ctl_o_2), .aclr(GND), .sclr(GND), .sload(GND), @@ -3337,18 +3297,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_0_23_.operation_mode="normal"; -defparam dout_i_i_0_23_.output_mode="comb_only"; -defparam dout_i_i_0_23_.lut_mask="f800"; -defparam dout_i_i_0_23_.synch_mode="off"; -defparam dout_i_i_0_23_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_0_15_ ( - .combout(dout_i_i_0_0), - .dataa(byte_addr_o_0), - .datab(dout_i_i_0_a[15]), - .datac(dout_0_a2_2_0), - .datad(data2core_15), +defparam dout_0_0_a2_2_a_0_.operation_mode="normal"; +defparam dout_0_0_a2_2_a_0_.output_mode="comb_only"; +defparam dout_0_0_a2_2_a_0_.lut_mask="0132"; +defparam dout_0_0_a2_2_a_0_.synch_mode="off"; +defparam dout_0_0_a2_2_a_0_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_0_31_ ( + .combout(dout_0_0_0_8), + .dataa(r32_o_0), + .datab(dout_0_0_0_a[31]), + .datac(dout_0_0_a2_1_7), + .datad(data2core_31), .aclr(GND), .sclr(GND), .sload(GND), @@ -3357,18 +3317,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_0_15_.operation_mode="normal"; -defparam dout_i_i_0_15_.output_mode="comb_only"; -defparam dout_i_i_0_15_.lut_mask="f400"; -defparam dout_i_i_0_15_.synch_mode="off"; -defparam dout_i_i_0_15_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_0_a_15_ ( - .combout(dout_i_i_0_a[15]), +defparam dout_0_0_0_31_.operation_mode="normal"; +defparam dout_0_0_0_31_.output_mode="comb_only"; +defparam dout_0_0_0_31_.lut_mask="f400"; +defparam dout_0_0_0_31_.synch_mode="off"; +defparam dout_0_0_0_31_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_0_a_31_ ( + .combout(dout_0_0_0_a[31]), .dataa(ctl_o_0), - .datab(ctl_o_3), - .datac(ctl_o_1), - .datad(byte_addr_o_1), + .datab(ctl_o_1), + .datac(ctl_o_3), + .datad(r32_o_1), .aclr(GND), .sclr(GND), .sload(GND), @@ -3377,18 +3337,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_0_a_15_.operation_mode="normal"; -defparam dout_i_i_0_a_15_.output_mode="comb_only"; -defparam dout_i_i_0_a_15_.lut_mask="1000"; -defparam dout_i_i_0_a_15_.synch_mode="off"; -defparam dout_i_i_0_a_15_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_a6_1_23_ ( - .combout(dout_i_i_a6_1_0), - .dataa(byte_addr_o_1), - .datab(byte_addr_o_0), - .datac(dout_0_a2_1_0), - .datad(data2core_7), +defparam dout_0_0_0_a_31_.operation_mode="normal"; +defparam dout_0_0_0_a_31_.output_mode="comb_only"; +defparam dout_0_0_0_a_31_.lut_mask="0004"; +defparam dout_0_0_0_a_31_.synch_mode="off"; +defparam dout_0_0_0_a_31_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_16_ ( + .combout(dout_0_0_a6_16), + .dataa(ctl_o_0), + .datab(ctl_o_2), + .datac(dout_0_0_a6_a[16]), + .datad(dout_0_0_a6_0_1), .aclr(GND), .sclr(GND), .sload(GND), @@ -3397,18 +3357,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_a6_1_23_.operation_mode="normal"; -defparam dout_i_i_a6_1_23_.output_mode="comb_only"; -defparam dout_i_i_a6_1_23_.lut_mask="8000"; -defparam dout_i_i_a6_1_23_.synch_mode="off"; -defparam dout_i_i_a6_1_23_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_0_0_o2_0_ ( - .combout(dout_0_0_o2[0]), - .dataa(byte_addr_o_1), - .datab(byte_addr_o_0), - .datac(dout_0_o2_1[7]), - .datad(dout_0_a2[8]), +defparam dout_0_0_a6_16_.operation_mode="normal"; +defparam dout_0_0_a6_16_.output_mode="comb_only"; +defparam dout_0_0_a6_16_.lut_mask="1110"; +defparam dout_0_0_a6_16_.synch_mode="off"; +defparam dout_0_0_a6_16_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_a_16_ ( + .combout(dout_0_0_a6_a[16]), + .dataa(VCC), + .datab(ctl_o_1), + .datac(ctl_o_3), + .datad(dout_0_0_o6_7), .aclr(GND), .sclr(GND), .sload(GND), @@ -3417,18 +3377,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_0_0_o2_0_.operation_mode="normal"; -defparam dout_0_0_o2_0_.output_mode="comb_only"; -defparam dout_0_0_o2_0_.lut_mask="ff80"; -defparam dout_0_0_o2_0_.synch_mode="off"; -defparam dout_0_0_o2_0_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_0_0_a2_2_0_ ( - .combout(dout_0_0_a2_2[0]), - .dataa(byte_addr_o_1), - .datab(byte_addr_o_0), - .datac(dout_0_a6_0_1[7]), - .datad(dout_0_a2_3_0), +defparam dout_0_0_a6_a_16_.operation_mode="normal"; +defparam dout_0_0_a6_a_16_.output_mode="comb_only"; +defparam dout_0_0_a6_a_16_.lut_mask="3000"; +defparam dout_0_0_a6_a_16_.synch_mode="off"; +defparam dout_0_0_a6_a_16_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_0_8_ ( + .combout(dout_0_0_a6_0_1), + .dataa(r32_o_0), + .datab(dout_0_0_a2_1_8), + .datac(dout_0_0_o6_0_0), + .datad(dout_0_0_o6_7), .aclr(GND), .sclr(GND), .sload(GND), @@ -3437,18 +3397,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_0_0_a2_2_0_.operation_mode="normal"; -defparam dout_0_0_a2_2_0_.output_mode="comb_only"; -defparam dout_0_0_a2_2_0_.lut_mask="5540"; -defparam dout_0_0_a2_2_0_.synch_mode="off"; -defparam dout_0_0_a2_2_0_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_0_a2_8_ ( - .combout(dout_0_a2[8]), - .dataa(ctl_o_3), - .datab(byte_addr_o_1), - .datac(byte_addr_o_0), - .datad(dout_0_a2_a[8]), +defparam dout_0_0_a6_0_8_.operation_mode="normal"; +defparam dout_0_0_a6_0_8_.output_mode="comb_only"; +defparam dout_0_0_a6_0_8_.lut_mask="c480"; +defparam dout_0_0_a6_0_8_.synch_mode="off"; +defparam dout_0_0_a6_0_8_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_7_ ( + .combout(dout_0_0_a6[7]), + .dataa(r32_o_0), + .datab(r32_o_1), + .datac(dout_0_0_a6_a[7]), + .datad(data2core_7), .aclr(GND), .sclr(GND), .sload(GND), @@ -3457,18 +3417,38 @@ .aload(GND), .regcascin(GND) ); -defparam dout_0_a2_8_.operation_mode="normal"; -defparam dout_0_a2_8_.output_mode="comb_only"; -defparam dout_0_a2_8_.lut_mask="5d00"; -defparam dout_0_a2_8_.synch_mode="off"; -defparam dout_0_a2_8_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_0_a2_a_8_ ( - .combout(dout_0_a2_a[8]), - .dataa(ctl_o_2), +defparam dout_0_0_a6_7_.operation_mode="normal"; +defparam dout_0_0_a6_7_.output_mode="comb_only"; +defparam dout_0_0_a6_7_.lut_mask="8000"; +defparam dout_0_0_a6_7_.synch_mode="off"; +defparam dout_0_0_a6_7_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_a_7_ ( + .combout(dout_0_0_a6_a[7]), + .dataa(ctl_o_1), .datab(ctl_o_0), - .datac(ctl_o_1), - .datad(ctl_o_3), + .datac(ctl_o_3), + .datad(ctl_o_2), + .aclr(GND), + .sclr(GND), + .sload(GND), + .ena(VCC), + .inverta(GND), + .aload(GND), + .regcascin(GND) +); +defparam dout_0_0_a6_a_7_.operation_mode="normal"; +defparam dout_0_0_a6_a_7_.output_mode="comb_only"; +defparam dout_0_0_a6_a_7_.lut_mask="0302"; +defparam dout_0_0_a6_a_7_.synch_mode="off"; +defparam dout_0_0_a6_a_7_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a2_8_ ( + .combout(dout_0_0_a2[8]), + .dataa(ctl_o_3), + .datab(ctl_o_2), + .datac(r32_o_1), + .datad(dout_0_0_a2_a[8]), .aclr(GND), .sclr(GND), .sload(GND), @@ -3477,17 +3457,17 @@ .aload(GND), .regcascin(GND) ); -defparam dout_0_a2_a_8_.operation_mode="normal"; -defparam dout_0_a2_a_8_.output_mode="comb_only"; -defparam dout_0_a2_a_8_.lut_mask="1120"; -defparam dout_0_a2_a_8_.synch_mode="off"; -defparam dout_0_a2_a_8_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_i_i_a6_0_23_ ( - .combout(dout_i_i_a6_0_0), +defparam dout_0_0_a2_8_.operation_mode="normal"; +defparam dout_0_0_a2_8_.output_mode="comb_only"; +defparam dout_0_0_a2_8_.lut_mask="6400"; +defparam dout_0_0_a2_8_.synch_mode="off"; +defparam dout_0_0_a2_8_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a2_a_8_ ( + .combout(dout_0_0_a2_a[8]), .dataa(ctl_o_1), - .datab(dout_0_a2_3_0), - .datac(dout_0_o2_0), + .datab(ctl_o_0), + .datac(ctl_o_3), .datad(VCC), .aclr(GND), .sclr(GND), @@ -3497,18 +3477,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_i_i_a6_0_23_.operation_mode="normal"; -defparam dout_i_i_a6_0_23_.output_mode="comb_only"; -defparam dout_i_i_a6_0_23_.lut_mask="4040"; -defparam dout_i_i_a6_0_23_.synch_mode="off"; -defparam dout_i_i_a6_0_23_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_0_a6_0_8_ ( - .combout(dout_0_a6_0_0), - .dataa(byte_addr_o_0), - .datab(dout_0_a2_1_0), - .datac(dout_0_o2_0_0), - .datad(dout_0_o2_0), +defparam dout_0_0_a2_a_8_.operation_mode="normal"; +defparam dout_0_0_a2_a_8_.output_mode="comb_only"; +defparam dout_0_0_a2_a_8_.lut_mask="3232"; +defparam dout_0_0_a2_a_8_.synch_mode="off"; +defparam dout_0_0_a2_a_8_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a2_0_0_ ( + .combout(dout_0_0_a2_0_0), + .dataa(ctl_o_1), + .datab(ctl_o_2), + .datac(r32_o_1), + .datad(dout_0_0_a2_0_0_Z[7]), .aclr(GND), .sclr(GND), .sload(GND), @@ -3517,18 +3497,18 @@ .aload(GND), .regcascin(GND) ); -defparam dout_0_a6_0_8_.operation_mode="normal"; -defparam dout_0_a6_0_8_.output_mode="comb_only"; -defparam dout_0_a6_0_8_.lut_mask="c480"; -defparam dout_0_a6_0_8_.synch_mode="off"; -defparam dout_0_a6_0_8_.sum_lutc_input="datac"; -// @13:177 +defparam dout_0_0_a2_0_0_.operation_mode="normal"; +defparam dout_0_0_a2_0_0_.output_mode="comb_only"; +defparam dout_0_0_a2_0_0_.lut_mask="0600"; +defparam dout_0_0_a2_0_0_.synch_mode="off"; +defparam dout_0_0_a2_0_0_.sum_lutc_input="datac"; +// @13:154 cyclone_lcell dout_0_0_a2_1_0_ ( - .combout(dout_0_0_a2_1_0), - .dataa(byte_addr_o_1), - .datab(byte_addr_o_0), - .datac(dout_0_a6_0_1[7]), - .datad(VCC), + .combout(dout_0_0_a2_1[0]), + .dataa(ctl_o_1), + .datab(ctl_o_2), + .datac(r32_o_1), + .datad(dout_0_0_a2_0_0_Z[7]), .aclr(GND), .sclr(GND), .sload(GND), @@ -3539,14 +3519,74 @@ ); defparam dout_0_0_a2_1_0_.operation_mode="normal"; defparam dout_0_0_a2_1_0_.output_mode="comb_only"; -defparam dout_0_0_a2_1_0_.lut_mask="1010"; +defparam dout_0_0_a2_1_0_.lut_mask="6000"; defparam dout_0_0_a2_1_0_.synch_mode="off"; defparam dout_0_0_a2_1_0_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_0_a2_0_8_ ( - .combout(dout_0_a2_0_0), - .dataa(byte_addr_o_1), - .datab(dout_0_a2_3_0), +// @13:154 + cyclone_lcell dout_0_0_o6_0_ ( + .combout(dout_0_0_o6[0]), + .dataa(r32_o_0), + .datab(r32_o_1), + .datac(dout_0_0_a6_a[7]), + .datad(dout_0_0_a2[8]), + .aclr(GND), + .sclr(GND), + .sload(GND), + .ena(VCC), + .inverta(GND), + .aload(GND), + .regcascin(GND) +); +defparam dout_0_0_o6_0_.operation_mode="normal"; +defparam dout_0_0_o6_0_.output_mode="comb_only"; +defparam dout_0_0_o6_0_.lut_mask="ff80"; +defparam dout_0_0_o6_0_.synch_mode="off"; +defparam dout_0_0_o6_0_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_1_7_ ( + .combout(dout_0_0_a6_1_0), + .dataa(ctl_o_1), + .datab(ctl_o_2), + .datac(dout_0_0_a2_0_0_Z[7]), + .datad(dout_0_0_o6_7), + .aclr(GND), + .sclr(GND), + .sload(GND), + .ena(VCC), + .inverta(GND), + .aload(GND), + .regcascin(GND) +); +defparam dout_0_0_a6_1_7_.operation_mode="normal"; +defparam dout_0_0_a6_1_7_.output_mode="comb_only"; +defparam dout_0_0_a6_1_7_.lut_mask="6000"; +defparam dout_0_0_a6_1_7_.synch_mode="off"; +defparam dout_0_0_a6_1_7_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_3_1_15_ ( + .combout(dout_0_0_a6_3_1[15]), + .dataa(ctl_o_2), + .datab(r32_o_0), + .datac(r32_o_1), + .datad(dout_0_0_a6_3_1_a[15]), + .aclr(GND), + .sclr(GND), + .sload(GND), + .ena(VCC), + .inverta(GND), + .aload(GND), + .regcascin(GND) +); +defparam dout_0_0_a6_3_1_15_.operation_mode="normal"; +defparam dout_0_0_a6_3_1_15_.output_mode="comb_only"; +defparam dout_0_0_a6_3_1_15_.lut_mask="0100"; +defparam dout_0_0_a6_3_1_15_.synch_mode="off"; +defparam dout_0_0_a6_3_1_15_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a6_3_1_a_15_ ( + .combout(dout_0_0_a6_3_1_a[15]), + .dataa(ctl_o_1), + .datab(ctl_o_0), .datac(VCC), .datad(VCC), .aclr(GND), @@ -3557,17 +3597,37 @@ .aload(GND), .regcascin(GND) ); -defparam dout_0_a2_0_8_.operation_mode="normal"; -defparam dout_0_a2_0_8_.output_mode="comb_only"; -defparam dout_0_a2_0_8_.lut_mask="4444"; -defparam dout_0_a2_0_8_.synch_mode="off"; -defparam dout_0_a2_0_8_.sum_lutc_input="datac"; -// @13:177 - cyclone_lcell dout_0_0_a2_0_0_ ( - .combout(dout_0_0_a2_0[0]), - .dataa(byte_addr_o_1), - .datab(byte_addr_o_0), - .datac(dout_0_a6_0_1[7]), +defparam dout_0_0_a6_3_1_a_15_.operation_mode="normal"; +defparam dout_0_0_a6_3_1_a_15_.output_mode="comb_only"; +defparam dout_0_0_a6_3_1_a_15_.lut_mask="2222"; +defparam dout_0_0_a6_3_1_a_15_.synch_mode="off"; +defparam dout_0_0_a6_3_1_a_15_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a_0_ ( + .combout(dout_0_0_a_0), + .dataa(dout_0_0_a2_2[0]), + .datab(dout_0_0_a2_1[0]), + .datac(data2core_16), + .datad(data2core_8), + .aclr(GND), + .sclr(GND), + .sload(GND), + .ena(VCC), + .inverta(GND), + .aload(GND), + .regcascin(GND) +); +defparam dout_0_0_a_0_.operation_mode="normal"; +defparam dout_0_0_a_0_.output_mode="comb_only"; +defparam dout_0_0_a_0_.lut_mask="135f"; +defparam dout_0_0_a_0_.synch_mode="off"; +defparam dout_0_0_a_0_.sum_lutc_input="datac"; +// @13:154 + cyclone_lcell dout_0_0_a_14_ ( + .combout(dout_0_0_a_14), + .dataa(dout_0_0_a2[8]), + .datab(data2core_14), + .datac(VCC), .datad(VCC), .aclr(GND), .sclr(GND), @@ -3577,15 +3637,55 @@ .aload(GND