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    Navigation: All forums > Cvs-checkins > Message List > Message Post

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    From: cvs at opencores.org<cvs@o...>
    Date: Fri Apr 27 17:18:43 CEST 2007
    Subject: [cvs-checkins] MODIFIED: aemb ...
    Top
    Date: 00/07/04 27:17:18

    Modified: aemb/sim/verilog testbench.v
    Log:
    Minor updates as sw/c/aeMB_testbench.c got updated.


    Revision Changes Path
    1.3 aemb/sim/verilog/testbench.v

    http://www.opencores.org/cvsweb.shtml/aemb/sim/verilog/testbench.v.diff?r1=1.2&r2=1.3

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: testbench.v
    ===================================================================
    RCS file: /cvsroot/sybreon/aemb/sim/verilog/testbench.v,v
    retrieving revision 1.2
    retrieving revision 1.3
    diff -u -b -r1.2 -r1.3
    --- testbench.v 25 Apr 2007 22:15:05 -0000 1.2
    +++ testbench.v 27 Apr 2007 15:18:43 -0000 1.3
    @@ -1,28 +1,32 @@
    /*
    - * $Id: testbench.v,v 1.2 2007/04/25 22:15:05 sybreon Exp $
    + * $Id: testbench.v,v 1.3 2007/04/27 15:18:43 sybreon Exp $
    *
    * AEMB Generic Testbench
    - * Copyright (C) 2006 Shawn Tan Ser Ngiap <shawn.tan@a...>
    + * Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@a...>
    *
    - * This library is free software; you can redistribute it and/or modify it
    - * under the terms of the GNU Lesser General Public License as published by
    - * the Free Software Foundation; either version 2.1 of the License,
    - * or (at your option) any later version.
    + * This library is free software; you can redistribute it and/or
    + * modify it under the terms of the GNU Lesser General Public License
    + * as published by the Free Software Foundation; either version 2.1 of
    + * the License, or (at your option) any later version.
    *
    * This library is distributed in the hope that it will be useful, but
    - * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
    - * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
    - * License for more details.
    - *
    - * You should have received a copy of the GNU Lesser General Public License
    - * along with this library; if not, write to the Free Software Foundation, Inc.,
    - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
    + * WITHOUT ANY WARRANTY; without even the implied warranty of
    + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
    + * Lesser General Public License for more details.
    + *
    + * You should have received a copy of the GNU Lesser General Public
    + * License along with this library; if not, write to the Free Software
    + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
    + * USA
    *
    * DESCRIPTION
    * Top level test bench and fake RAM/ROM.
    *
    * HISTORY
    * $Log: testbench.v,v $
    + * Revision 1.3 2007/04/27 15:18:43 sybreon
    + * Minor updates as sw/c/aeMB_testbench.c got updated.
    + *
    * Revision 1.2 2007/04/25 22:15:05 sybreon
    * Added support for 8-bit and 16-bit data types.
    *
    @@ -126,10 +130,10 @@
    if (dut.regfile.wDWE)
    $writeh("\tR",dut.regfile.rRD_,"=",dut.regfile.wDDAT,";");

    - if ((dwb_adr_o == 16'h8888) && (dwb_dat_o == 32'h7a55ed00))
    - $display("*** SERVICE ***");
    + if (dwb_we_o & (dwb_dat_o == "INTR"))
    + $display("\t*** SERVICE ***");
    if (dut.control.rFSM == 2'o1)
    - $display("*** INTERRUPT ***");
    + $display("\t*** INTERRUPT ***");

    if (dwb_we_o & (dwb_dat_o == "FAIL")) begin
    $display("\tFAIL");



     
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