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From: cvs at opencores.org<cvs@o...>
Date: Fri Apr 20 17:22:35 CEST 2007
Subject: [cvs-checkins] MODIFIED: mlite ...
Date: 00/07/04 20:17:22

Modified: mlite/vhdl mlite_cpu.vhd
Log:
Fixed stages comment


Revision Changes Path
1.16 mlite/vhdl/mlite_cpu.vhd

http://www.opencores.org/cvsweb.shtml/mlite/vhdl/mlite_cpu.vhd.diff?r1=1.15&r2=1.16

(In the diff below, changes in quantity of whitespace are not shown.)

Index: mlite_cpu.vhd
===================================================================
RCS file: /cvsroot/rhoads/mlite/vhdl/mlite_cpu.vhd,v
retrieving revision 1.15
retrieving revision 1.16
diff -u -b -r1.15 -r1.16
--- mlite_cpu.vhd 20 Apr 2007 14:45:38 -0000 1.15
+++ mlite_cpu.vhd 20 Apr 2007 15:22:35 -0000 1.16
@@ -59,13 +59,13 @@
-- intr_in mem_pause
-- reset_in mem_byte_we Stages
-- ns mem_address mem_data_w mem_data_r 40 44 48 4c 50
--- 3500 0 0 00000040 00000000 00000000 0 0 1
--- 3600 0 0 00000044 00000000 34040041 0 0 2 1
--- 3700 0 0 00000048 00000000 3405FFFF 0 0 3 2 1
--- 3800 0 0 0000004C 00000000 A0A40000 0 0 3 2 1
--- 3900 0 0 0000FFFC 41414141 00000000 1 0 3 2
--- 4000 0 0 00000050 41414141 XXXXXX41 0 0 4b 3 1
--- 4100 0 0 00000054 00000000 00000000 0 0 2
+-- 3500 0 0 00000040 00000000 00000000 0 0 0
+-- 3600 0 0 00000044 00000000 34040041 0 0 1 0
+-- 3700 0 0 00000048 00000000 3405FFFF 0 0 2 1 0
+-- 3800 0 0 0000004C 00000000 A0A40000 0 0 2 1 0
+-- 3900 0 0 0000FFFC 41414141 00000000 1 0 2 1
+-- 4000 0 0 00000050 41414141 XXXXXX41 0 0 3 2 0
+-- 4100 0 0 00000054 00000000 00000000 0 0 1
---------------------------------------------------------------------
library ieee;
use work.mlite_pack.all;