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From: cvs at opencores.org<cvs@o...>
Date: Thu Apr 12 22:23:07 CEST 2007
Subject: [cvs-checkins] NEW: -m
Date: 00/07/04 12:22:23

Removed: aemb/rtl/verilog aeMB_testbench.v
Log:
Moved testbench into /sim/verilog.

Simulation cleanups.