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From: cvs at opencores.org<cvs@o...>
Date: Tue Mar 27 01:27:03 CEST 2007
Subject: [cvs-checkins] MODIFIED: s1_core ...
Date: 00/07/03 27:01:27

Modified: s1_core/tools/bin build_fpga build_dc
Log:
Added "tee" to see output both on screen and saved in the logfile.




Revision Changes Path
1.2 s1_core/tools/bin/build_fpga

http://www.opencores.org/cvsweb.shtml/s1_core/tools/bin/build_fpga.diff?r1=1.1&r2=1.2

(In the diff below, changes in quantity of whitespace are not shown.)

Index: build_fpga
===================================================================
RCS file: /cvsroot/fafa1971/s1_core/tools/bin/build_fpga,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- build_fpga 4 Jan 2007 02:21:49 -0000 1.1
+++ build_fpga 26 Mar 2007 23:27:03 -0000 1.2
@@ -1,5 +1,5 @@
#!/bin/bash

cd $S1_ROOT/run/synth/fpga
-iverilog -t fpga -o fpga.edif -c$FILELIST_FPGA &> synth.log
+iverilog -t fpga -o fpga.edif -c$FILELIST_FPGA 2>&1 | tee synth.log




1.2 s1_core/tools/bin/build_dc

http://www.opencores.org/cvsweb.shtml/s1_core/tools/bin/build_dc.diff?r1=1.1&r2=1.2

(In the diff below, changes in quantity of whitespace are not shown.)

Index: build_dc
===================================================================
RCS file: /cvsroot/fafa1971/s1_core/tools/bin/build_dc,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- build_dc 4 Jan 2007 02:21:49 -0000 1.1
+++ build_dc 26 Mar 2007 23:27:03 -0000 1.2
@@ -3,5 +3,5 @@
cd $S1_ROOT/run/synth/dc
rm -rf * .syn* # Make clean
ln -f -s ../../../tools/src/.synopsys_dc.setup
-dc_shell -db_mode -dcsh_mode -f $FILELIST_DC &> synth.log
+dc_shell -db_mode -dcsh_mode -f $FILELIST_DC 2>&1 | tee synth.log