LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Find Resources
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cvs-checkins > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: cvs at opencores.org<cvs@o...>
    Date: Wed Feb 7 10:21:11 CET 2007
    Subject: [cvs-checkins] MODIFIED: raggedstone ...
    Top
    Date: 00/07/02 07:10:21

    Modified: raggedstone README
    Log:
    Add credit to Manuel Bessler.




    Revision Changes Path
    1.2 raggedstone/README

    http://www.opencores.org/cvsweb.shtml/raggedstone/README.diff?r1=1.1&r2=1.2

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: README
    ===================================================================
    RCS file: /cvsroot/jcarr/raggedstone/README,v
    retrieving revision 1.1
    retrieving revision 1.2
    diff -u -b -r1.1 -r1.2
    --- README 7 Feb 2007 07:43:23 -0000 1.1
    +++ README 7 Feb 2007 09:21:11 -0000 1.2
    @@ -16,4 +16,8 @@
    4) program your card over jtag with XC3prog
    xc3sprog pci_7seg.bit

    +
    +This port of the OpenCores PCI core was originally done by Manuel Bessler.
    +http://projects.varxec.net/raggedstone1
    +
    -- Jeff Carr <basilarchia@g...>



     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.