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    Navigation: All forums > Cvs-checkins > Message List > Message Post

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    From: cvs at opencores.org<cvs@o...>
    Date: Fri Dec 29 09:17:18 CET 2006
    Subject: [cvs-checkins] MODIFIED: ae18 ...
    Top
    Date: 00/06/12 29:09:17

    Modified: ae18/sw/asm ae18_core.asm
    Log:
    Minor bug fix.




    Revision Changes Path
    1.2 ae18/sw/asm/ae18_core.asm

    http://www.opencores.org/cvsweb.shtml/ae18/sw/asm/ae18_core.asm.diff?r1=1.1&r2=1.2

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: ae18_core.asm
    ===================================================================
    RCS file: /cvsroot/sybreon/ae18/sw/asm/ae18_core.asm,v
    retrieving revision 1.1
    retrieving revision 1.2
    diff -u -b -r1.1 -r1.2
    --- ae18_core.asm 28 Dec 2006 15:30:31 -0000 1.1
    +++ ae18_core.asm 29 Dec 2006 08:17:17 -0000 1.2
    @@ -1,4 +1,6 @@
    ;;;
    +;;; $Id: ae18_core.asm,v 1.2 2006/12/29 08:17:17 sybreon Exp $
    +;;;
    ;;; Copyright (C) 2006 Shawn Tan Ser Ngiap <shawn.tan@a...>
    ;;;
    ;;; This library is free software; you can redistribute it and/or modify it
    @@ -92,13 +94,19 @@

    ;;
    ;; TABLE tests - OK
    - ;; Tests to check that TBLWT/TBLRD are working
    + ;; Tests to check that TBLRD is working
    ;;
    _TBL_TEST:
    + clrf TBLPTRH
    + clrf TBLPTRL
    tblrd*+ ; TABLAT = 10
    + movf TABLAT,W
    + xorlw 0x10
    + bnz $
    tblrd*+ ; TABLAT = EF
    - tblrd*+ ; TABLAT = 00
    - tblrd*+ ; TABLAT = FF
    + movf TABLAT,W
    + xorlw 0xEF
    + bnz $
    retlw 0x00

    ;;
    @@ -318,7 +326,8 @@
    incf reg2,F ; REG2 = 0x5B
    decf reg2,F ; REG2 = 0x5A

    - xorwf reg2,W ; WREG = 0x00
    + xorwf reg2,W ; WREG = 0xFF
    + xorlw 0xFF
    bnz $
    retlw 0x00




     
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