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From: cvs at opencores.org<cvs@o...>
Date: Sat Jul 29 00:32:26 CEST 2006
Subject: [cvs-checkins] MODIFIED: fpuvhdl ...
Date: 00/06/07 29:00:32

Modified: fpuvhdl/fpuvhdl/multiplier fpmul_pipeline.vhd
fpmul_single_cycle.vhd fpmul_stage1_struct.vhd
fpmul_stage2_struct.vhd fpmul_stage3_struct.vhd
fpmul_stage4_struct.vhd
Log:
Removed reference to the HAVOC library. Using default work.

Corrected bug in the underflow check of the multiplier.


Revision Changes Path
1.2 fpuvhdl/fpuvhdl/multiplier/fpmul_pipeline.vhd

http://www.opencores.org/cvsweb.shtml/fpuvhdl/fpuvhdl/multiplier/fpmul_pipeline.vhd.diff?r1=1.1&r2=1.2

(In the diff below, changes in quantity of whitespace are not shown.)

Index: fpmul_pipeline.vhd
===================================================================
RCS file: /cvsroot/gmarcus/fpuvhdl/fpuvhdl/multiplier/fpmul_pipeline.vhd,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- fpmul_pipeline.vhd 5 Nov 2004 14:06:35 -0000 1.1
+++ fpmul_pipeline.vhd 28 Jul 2006 22:32:25 -0000 1.2
@@ -42,8 +42,6 @@
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

-LIBRARY HAVOC;
-
ARCHITECTURE pipeline OF FPmul IS

-- Architecture declarations
@@ -150,10 +148,10 @@

-- Optional embedded configurations
-- pragma synthesis_off
- FOR ALL : FPmul_stage1 USE ENTITY HAVOC.FPmul_stage1;
- FOR ALL : FPmul_stage2 USE ENTITY HAVOC.FPmul_stage2;
- FOR ALL : FPmul_stage3 USE ENTITY HAVOC.FPmul_stage3;
- FOR ALL : FPmul_stage4 USE ENTITY HAVOC.FPmul_stage4;
+ FOR ALL : FPmul_stage1 USE ENTITY work.FPmul_stage1;
+ FOR ALL : FPmul_stage2 USE ENTITY work.FPmul_stage2;
+ FOR ALL : FPmul_stage3 USE ENTITY work.FPmul_stage3;
+ FOR ALL : FPmul_stage4 USE ENTITY work.FPmul_stage4;
-- pragma synthesis_on





1.2 fpuvhdl/fpuvhdl/multiplier/fpmul_single_cycle.vhd

http://www.opencores.org/cvsweb.shtml/fpuvhdl/fpuvhdl/multiplier/fpmul_single_cycle.vhd.diff?r1=1.1&r2=1.2

(In the diff below, changes in quantity of whitespace are not shown.)

Index: fpmul_single_cycle.vhd
===================================================================
RCS file: /cvsroot/gmarcus/fpuvhdl/fpuvhdl/multiplier/fpmul_single_cycle.vhd,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- fpmul_single_cycle.vhd 5 Nov 2004 14:06:35 -0000 1.1
+++ fpmul_single_cycle.vhd 28 Jul 2006 22:32:25 -0000 1.2
@@ -42,8 +42,6 @@
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

-LIBRARY HAVOC;
-
ARCHITECTURE single_cycle OF FPmul IS

-- Architecture declarations
@@ -134,10 +132,10 @@

-- Optional embedded configurations
-- pragma synthesis_off
- FOR ALL : FPnormalize USE ENTITY HAVOC.FPnormalize;
- FOR ALL : FPround USE ENTITY HAVOC.FPround;
- FOR ALL : PackFP USE ENTITY HAVOC.PackFP;
- FOR ALL : UnpackFP USE ENTITY HAVOC.UnpackFP;
+ FOR ALL : FPnormalize USE ENTITY work.FPnormalize;
+ FOR ALL : FPround USE ENTITY work.FPround;
+ FOR ALL : PackFP USE ENTITY work.PackFP;
+ FOR ALL : UnpackFP USE ENTITY work.UnpackFP;
-- pragma synthesis_on


@@ -234,8 +232,10 @@
-- eb6 6
PROCESS(SIG_out_norm2,A_EXP,B_EXP, EXP_out)
BEGIN
- IF (EXP_out(7)='1' AND A_EXP(7)='0' AND B_EXP(7)='0') OR
- (SIG_out_norm2(26 DOWNTO 3)="000000000000000000000000") THEN
+ IF ( EXP_out(7)='1' AND
+ ( (A_EXP(7)='0' AND NOT (A_EXP=X"7F")) AND
+ (B_EXP(7)='0' AND NOT (B_EXP=X"7F")) ) ) OR
+ (SIG_out_norm2(26 DOWNTO 3)=X"000000") THEN
-- Underflow or zero significand SIG_isZ <= '1'; ELSE 1.2 fpuvhdl/fpuvhdl/multiplier/fpmul_stage1_struct.vhd http://www.opencores.org/cvsweb.shtml/fpuvhdl/fpuvhdl/multiplier/fpmul_stage1_struct.vhd.diff?r1=1.1&r2=1.2 (In the diff below, changes in quantity of whitespace are not shown.) Index: fpmul_stage1_struct.vhd =================================================================== RCS file: /cvsroot/gmarcus/fpuvhdl/fpuvhdl/multiplier/fpmul_stage1_struct.vhd,v retrieving revision 1.1 retrieving revision 1.2 diff -u -b -r1.1 -r1.2 --- fpmul_stage1_struct.vhd 5 Nov 2004 14:06:35 -0000 1.1 +++ fpmul_stage1_struct.vhd 28 Jul 2006 22:32:25 -0000 1.2 @@ -49,7 +49,6 @@ USE ieee.std_logic_1164.all; USE ieee.std_logic_arith.all; -LIBRARY HAVOC; ARCHITECTURE struct OF FPmul_stage1 IS @@ -93,7 +92,7 @@ -- Optional embedded configurations -- pragma synthesis_off - FOR ALL : UnpackFP USE ENTITY HAVOC.UnpackFP; + FOR ALL : UnpackFP USE ENTITY work.UnpackFP; -- pragma synthesis_on 1.2 fpuvhdl/fpuvhdl/multiplier/fpmul_stage2_struct.vhd http://www.opencores.org/cvsweb.shtml/fpuvhdl/fpuvhdl/multiplier/fpmul_stage2_struct.vhd.diff?r1=1.1&r2=1.2 (In the diff below, changes in quantity of whitespace are not shown.) Index: fpmul_stage2_struct.vhd =================================================================== RCS file: /cvsroot/gmarcus/fpuvhdl/fpuvhdl/multiplier/fpmul_stage2_struct.vhd,v retrieving revision 1.1 retrieving revision 1.2 diff -u -b -r1.1 -r1.2 --- fpmul_stage2_struct.vhd 5 Nov 2004 14:06:35 -0000 1.1 +++ fpmul_stage2_struct.vhd 28 Jul 2006 22:32:25 -0000 1.2 @@ -109,7 +109,8 @@ -- HDL Embedded Text Block 5 eb1 -- exp_pos 5 EXP_pos_int <= A_EXP(7) AND B_EXP(7); - EXP_neg_int <= NOT (A_EXP(7) OR B_EXP(7)); +-- EXP_neg_int <= NOT(A_EXP(7) OR B_EXP(7)); + EXP_neg_int <= '1' WHEN ( (A_EXP(7)='0' AND NOT (A_EXP=X"7F")) AND (B_EXP(7)='0' AND NOT (B_EXP=X"7F")) ) ELSE '0'; -- ModuleWare code(v1.1) for instance 'I4' of 'add' 1.2 fpuvhdl/fpuvhdl/multiplier/fpmul_stage3_struct.vhd http://www.opencores.org/cvsweb.shtml/fpuvhdl/fpuvhdl/multiplier/fpmul_stage3_struct.vhd.diff?r1=1.1&r2=1.2 (In the diff below, changes in quantity of whitespace are not shown.) Index: fpmul_stage3_struct.vhd =================================================================== RCS file: /cvsroot/gmarcus/fpuvhdl/fpuvhdl/multiplier/fpmul_stage3_struct.vhd,v retrieving revision 1.1 retrieving revision 1.2 diff -u -b -r1.1 -r1.2 --- fpmul_stage3_struct.vhd 5 Nov 2004 14:06:35 -0000 1.1 +++ fpmul_stage3_struct.vhd 28 Jul 2006 22:32:25 -0000 1.2 @@ -55,8 +55,6 @@ USE ieee.std_logic_1164.all; USE ieee.std_logic_arith.all; -LIBRARY HAVOC; - ARCHITECTURE struct OF FPmul_stage3 IS -- Architecture declarations @@ -94,8 +92,8 @@ -- Optional embedded configurations -- pragma synthesis_off - FOR ALL : FPnormalize USE ENTITY HAVOC.FPnormalize; - FOR ALL : FPround USE ENTITY HAVOC.FPround; + FOR ALL : FPnormalize USE ENTITY work.FPnormalize; + FOR ALL : FPround USE ENTITY work.FPround; -- pragma synthesis_on 1.2 fpuvhdl/fpuvhdl/multiplier/fpmul_stage4_struct.vhd http://www.opencores.org/cvsweb.shtml/fpuvhdl/fpuvhdl/multiplier/fpmul_stage4_struct.vhd.diff?r1=1.1&r2=1.2 (In the diff below, changes in quantity of whitespace are not shown.) Index: fpmul_stage4_struct.vhd =================================================================== RCS file: /cvsroot/gmarcus/fpuvhdl/fpuvhdl/multiplier/fpmul_stage4_struct.vhd,v retrieving revision 1.1 retrieving revision 1.2 diff -u -b -r1.1 -r1.2 --- fpmul_stage4_struct.vhd 5 Nov 2004 14:06:35 -0000 1.1 +++ fpmul_stage4_struct.vhd 28 Jul 2006 22:32:25 -0000 1.2 @@ -48,8 +48,6 @@ USE ieee.std_logic_1164.all; USE ieee.std_logic_arith.all; -LIBRARY HAVOC; - ARCHITECTURE struct OF FPmul_stage4 IS -- Architecture declarations @@ -90,8 +88,8 @@ -- Optional embedded configurations -- pragma synthesis_off - FOR ALL : FPnormalize USE ENTITY HAVOC.FPnormalize; - FOR ALL : PackFP USE ENTITY HAVOC.PackFP; + FOR ALL : FPnormalize USE ENTITY work.FPnormalize; + FOR ALL : PackFP USE ENTITY work.PackFP; -- pragma synthesis_on