Message

Reply | Reply all

Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

From: cvs at opencores.org<cvs@o...>
Date: Tue Dec 20 12:40:27 CET 2005
Subject: [cvs-checkins] MODIFIED: or1k ...
Date: 00/05/12 20:12:40

Added: or1k/rc203soc/sw/uClinux/include/asm-m68k a.out.h amifd.h
amifdreg.h amigahw.h amigaints.h amigamouse.h
amigardb.h amigatypes.h amihdreg.h atafd.h
atafdreg.h atari_SCCserial.h atari_joystick.h
atari_mouse.h atari_rootsec.h atari_stdma.h
atarihdreg.h atarihw.h atariints.h atarikb.h
atomic.h bitops.h bootinfo.h bugs.h byteorder.h
cachectl.h checksum.h delay.h dma.h elf.h errno.h
fcntl.h font.h ide.h io.h ioctl.h ioctls.h irq.h
machdep.h mman.h mmu_context.h page.h param.h
pgtable.h posix_types.h processor.h ptrace.h
resource.h segment.h serial.h shm.h shmparam.h
sigcontext.h signal.h socket.h sockios.h stat.h
statfs.h string.h system.h termbits.h termios.h
traps.h types.h unaligned.h unistd.h user.h zorro.h
Log:
First Import of RC20x uClinux


Revision Changes Path
1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/a.out.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/a.out.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: a.out.h
===================================================================
#ifndef __M68K_A_OUT_H__
#define __M68K_A_OUT_H__

struct exec
{
unsigned long a_info; /* Use macros N_MAGIC, etc for access */
unsigned a_text; /* length of text, in bytes */
unsigned a_data; /* length of data, in bytes */
unsigned a_bss; /* length of uninitialized data area for file, in bytes */
unsigned a_syms; /* length of symbol table data in file, in bytes */
unsigned a_entry; /* start address */
unsigned a_trsize; /* length of relocation info for text, in bytes */
unsigned a_drsize; /* length of relocation info for data, in bytes */
};

#define N_TRSIZE(a) ((a).a_trsize)
#define N_DRSIZE(a) ((a).a_drsize)
#define N_SYMSIZE(a) ((a).a_syms)

#ifdef __KERNEL__

#define STACK_TOP TASK_SIZE

#endif

#endif /* __M68K_A_OUT_H__ */



1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/amifd.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/amifd.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: amifd.h
===================================================================
#ifndef _ASM_M68K_AMIFD_H
#define _ASM_M68K_AMIFD_H

/* Definitions for the Amiga floppy driver */

#include <linux/fd.h>

#define FD_MAX_UNITS 4

struct fd_data_type {
char *name; /* description of data type */
int sects; /* sectors per track */
#ifdef __STDC__
int (*read_fkt)(int, unsigned char *, unsigned long, int);
void (*write_fkt)(int, unsigned long, unsigned char *, int);
#else
int (*read_fkt)(); /* read whole track */
void (*write_fkt)(); /* write whole track */
#endif
};

#ifndef ASSEMBLER
/*
** Floppy type descriptions
*/

struct fd_drive_type {
unsigned long code; /* code returned from drive */
char *name; /* description of drive */
unsigned int tracks; /* number of tracks */
unsigned int heads; /* number of heads */
unsigned int read_size; /* raw read size for one track */
unsigned int write_size; /* raw write size for one track */
unsigned int sect_mult; /* sectors and gap multiplier (HD = 2) */
unsigned int precomp1; /* start track for precomp 1 */
unsigned int precomp2; /* start track for precomp 2 */
unsigned int step_delay; /* time (in ms) for delay after step */
unsigned int settle_time; /* time to settle after dir change */
unsigned int side_time; /* time needed to change sides */
}; struct amiga_floppy_struct { struct fd_drive_type *type; /* type of floppy for this unit */ struct fd_data_type *dtype; /* type of floppy for this unit */ int track; /* current track (-1 == unknown) */ int blocks; /* total # blocks on disk */ int sects; /* number of sectors per track */ int disk; /* disk in drive (-1 == unknown) */ int motor; /* true when motor is at speed */ int busy; /* true when drive is active */ int status; /* current error code for unit */ }; #endif #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/amifdreg.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/amifdreg.h?rev=1.1&content-type=text/x-cvsweb-markup Index: amifdreg.h =================================================================== #ifndef _LINUX_AMIFDREG_H #define _LINUX_AMIFDREG_H /* ** CIAAPRA bits (read only) */ #define DSKRDY (0x1<<5) /* disk ready when low */ #define DSKTRACK0 (0x1<<4) /* head at track zero when low */ #define DSKPROT (0x1<<3) /* disk protected when low */ #define DSKCHANGE (0x1<<2) /* low when disk removed */ /* ** CIAAPRB bits (read/write) */ #define DSKMOTOR (0x1<<7) /* motor on when low */ #define DSKSEL3 (0x1<<6) /* select drive 3 when low */ #define DSKSEL2 (0x1<<5) /* select drive 2 when low */ #define DSKSEL1 (0x1<<4) /* select drive 1 when low */ #define DSKSEL0 (0x1<<3) /* select drive 0 when low */ #define DSKSIDE (0x1<<2) /* side selection: 0 = upper, 1 = lower */ #define DSKDIREC (0x1<<1) /* step direction: 0=in, 1=out (to trk 0) */ #define DSKSTEP (0x1) /* pulse low to step head 1 track */ /* ** DSKBYTR bits (read only) */ #define DSKBYT (1<<15) /* register contains valid byte when set */ #define DMAON (1<<14) /* disk DMA enabled */ #define DISKWRITE (1<<13) /* disk write bit in DSKLEN enabled */ #define WORDEQUAL (1<<12) /* DSKSYNC register match when true */ /* bits 7-0 are data */ /* ** ADKCON/ADKCONR bits */ #ifndef SETCLR #define ADK_SETCLR (1<<15) /* control bit */ #endif #define ADK_PRECOMP1 (1<<14) /* precompensation selection */ #define ADK_PRECOMP0 (1<<13) /* 00=none, 01=140ns, 10=280ns, 11=500ns */ #define ADK_MFMPREC (1<<12) /* 0=GCR precomp., 1=MFM precomp. */ #define ADK_WORDSYNC (1<<10) /* enable DSKSYNC auto DMA */ #define ADK_MSBSYNC (1<<9) /* when 1, enable sync on MSbit (for GCR) */ #define ADK_FAST (1<<8) /* bit cell: 0=2us (GCR), 1=1us (MFM) */ /* ** DSKLEN bits */ #define DSKLEN_DMAEN (1<<15) #define DSKLEN_WRITE (1<<14) /* ** INTENA/INTREQ bits */ #define DSKINDEX (0x1<<4) /* DSKINDEX bit */ /* ** Misc */ #define MFM_SYNC 0x4489 /* standard MFM sync value */ /* Values for FD_COMMAND */ #define FD_RECALIBRATE 0x07 /* move to track 0 */ #define FD_SEEK 0x0F /* seek track */ #define FD_READ 0xE6 /* read with MT, MFM, SKip deleted */ #define FD_WRITE 0xC5 /* write with MT, MFM */ #define FD_SENSEI 0x08 /* Sense Interrupt Status */ #define FD_SPECIFY 0x03 /* specify HUT etc */ #define FD_FORMAT 0x4D /* format one track */ #define FD_VERSION 0x10 /* get version code */ #define FD_CONFIGURE 0x13 /* configure FIFO operation */ #define FD_PERPENDICULAR 0x12 /* perpendicular r/w mode */ #endif /* _LINUX_AMIFDREG_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/amigahw.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/amigahw.h?rev=1.1&content-type=text/x-cvsweb-markup Index: amigahw.h =================================================================== /* ** asm-m68k/amigahw.h -- This header defines some macros and pointers for ** the various Amiga custom hardware registers. ** The naming conventions used here conform to those ** used in the Amiga Hardware Reference Manual, 3rd Edition ** ** Copyright 1992 by Greg Harp ** ** This file is subject to the terms and conditions of the GNU General Public ** License. See the file COPYING in the main directory of this archive ** for more details. ** ** Created: 9/24/92 by Greg Harp */ #ifndef _ASMm68k_AMIGAHW_H_ #define _ASMm68k_AMIGAHW_H_ struct CUSTOM { u_short bltddat; u_short dmaconr; u_short vposr; u_short vhposr; u_short dskdatr; u_short joy0dat; u_short joy1dat; u_short clxdat; u_short adkconr; u_short pot0dat; u_short pot1dat; u_short potgor; u_short serdatr; u_short dskbytr; u_short intenar; u_short intreqr; u_char *dskptr; u_short dsklen; u_short dskdat; u_short refptr; u_short vposw; u_short vhposw; u_short copcon; u_short serdat; u_short serper; u_short potgo; u_short joytest; u_short strequ; u_short strvbl; u_short strhor; u_short strlong; u_short bltcon0; u_short bltcon1; u_short bltafwm; u_short bltalwm; u_char *bltcpt; u_char *bltbpt; u_char *bltapt; u_char *bltdpt; u_short bltsize; u_char pad2d; u_char bltcon0l; u_short bltsizv; u_short bltsizh; u_short bltcmod; u_short bltbmod; u_short bltamod; u_short bltdmod; u_short spare2[4]; u_short bltcdat; u_short bltbdat; u_short bltadat; u_short spare3[3]; u_short deniseid; u_short dsksync; u_short *cop1lc; u_short *cop2lc; u_short copjmp1; u_short copjmp2; u_short copins; u_short diwstrt; u_short diwstop; u_short ddfstrt; u_short ddfstop; u_short dmacon; u_short clxcon; u_short intena; u_short intreq; u_short adkcon; struct { u_short *audlc; u_short audlen; u_short audper; u_short audvol; u_short auddat; u_short audspare[2]; } aud[4]; u_char *bplpt[8]; u_short bplcon0; u_short bplcon1; u_short bplcon2; u_short bplcon3; u_short bpl1mod; u_short bpl2mod; u_short bplcon4; u_short clxcon2; u_short bpldat[8]; u_char *sprpt[8]; struct { u_short pos; u_short ctl; u_short dataa; u_short datab; } spr[8]; u_short color[32]; u_short htotal; u_short hsstop; u_short hbstrt; u_short hbstop; u_short vtotal; u_short vsstop; u_short vbstrt; u_short vbstop; u_short sprhstrt; u_short sprhstop; u_short bplhstrt; u_short bplhstop; u_short hhposw; u_short hhposr; u_short beamcon0; u_short hsstrt; u_short vsstrt; u_short hcenter; u_short diwhigh; u_short spare4[11]; u_short fmode; }; /* * DMA register bits */ #define DMAF_SETCLR (0x8000) #define DMAF_AUD0 (0x0001) #define DMAF_AUD1 (0x0002) #define DMAF_AUD2 (0x0004) #define DMAF_AUD3 (0x0008) #define DMAF_DISK (0x0010) #define DMAF_SPRITE (0x0020) #define DMAF_BLITTER (0x0040) #define DMAF_COPPER (0x0080) #define DMAF_RASTER (0x0100) #define DMAF_MASTER (0x0200) #define DMAF_BLITHOG (0x0400) #define DMAF_BLTNZERO (0x2000) #define DMAF_BLTDONE (0x4000) #define DMAF_ALL (0x01FF) struct CIA { u_char pra; char pad0[0xff]; u_char prb; char pad1[0xff]; u_char ddra; char pad2[0xff]; u_char ddrb; char pad3[0xff]; u_char talo; char pad4[0xff]; u_char tahi; char pad5[0xff]; u_char tblo; char pad6[0xff]; u_char tbhi; char pad7[0xff]; u_char todlo; char pad8[0xff]; u_char todmid; char pad9[0xff]; u_char todhi; char pada[0x1ff]; u_char sdr; char padb[0xff]; u_char icr; char padc[0xff]; u_char cra; char padd[0xff]; u_char crb; char pade[0xff]; }; #if 1 #define zTwoBase (0x80000000) #define ZTWO_PADDR(x) (((unsigned long)(x))-zTwoBase) #define ZTWO_VADDR(x) (((unsigned long)(x))+zTwoBase) #else #define zTwoBase 0 #define ZTWO_PADDR(x) (x) #define ZTWO_VADDR(x) (x) #endif #define CUSTOM_PHYSADDR (0xdff000) #define custom ((*(volatile struct CUSTOM *)(zTwoBase+CUSTOM_PHYSADDR))) #define CIAA_PHYSADDR (0xbfe001) #define CIAB_PHYSADDR (0xbfd000) #define ciaa ((*(volatile struct CIA *)(zTwoBase + CIAA_PHYSADDR))) #define ciab ((*(volatile struct CIA *)(zTwoBase + CIAB_PHYSADDR))) #define CHIP_PHYSADDR (0x000000) #define chipaddr ((unsigned long)(zTwoBase + CHIP_PHYSADDR)) void amiga_chip_init (void); void *amiga_chip_alloc (long size); void amiga_chip_free (void *); struct tod3000 { unsigned int :28, second2:4; /* lower digit */ unsigned int :28, second1:4; /* upper digit */ unsigned int :28, minute2:4; /* lower digit */ unsigned int :28, minute1:4; /* upper digit */ unsigned int :28, hour2:4; /* lower digit */ unsigned int :28, hour1:4; /* upper digit */ unsigned int :28, weekday:4; unsigned int :28, day2:4; /* lower digit */ unsigned int :28, day1:4; /* upper digit */ unsigned int :28, month2:4; /* lower digit */ unsigned int :28, month1:4; /* upper digit */ unsigned int :28, year2:4; /* lower digit */ unsigned int :28, year1:4; /* upper digit */ unsigned int :28, cntrl1:4; /* control-byte 1 */ unsigned int :28, cntrl2:4; /* control-byte 2 */ unsigned int :28, cntrl3:4; /* control-byte 3 */ }; #define TOD3000_CNTRL1_HOLD 0 #define TOD3000_CNTRL1_FREE 9 #define TOD_3000 ((struct tod3000 *)(zTwoBase+0xDC0000)) struct tod2000 { unsigned int :28, second2:4; /* lower digit */ unsigned int :28, second1:4; /* upper digit */ unsigned int :28, minute2:4; /* lower digit */ unsigned int :28, minute1:4; /* upper digit */ unsigned int :28, hour2:4; /* lower digit */ unsigned int :28, hour1:4; /* upper digit */ unsigned int :28, day2:4; /* lower digit */ unsigned int :28, day1:4; /* upper digit */ unsigned int :28, month2:4; /* lower digit */ unsigned int :28, month1:4; /* upper digit */ unsigned int :28, year2:4; /* lower digit */ unsigned int :28, year1:4; /* upper digit */ unsigned int :28, weekday:4; unsigned int :28, cntrl1:4; /* control-byte 1 */ unsigned int :28, cntrl2:4; /* control-byte 2 */ unsigned int :28, cntrl3:4; /* control-byte 3 */ }; #define TOD2000_CNTRL1_HOLD (1<<0) #define TOD2000_CNTRL1_BUSY (1<<1) #define TOD2000_CNTRL3_24HMODE (1<<2) #define TOD2000_HOUR1_PM (1<<2) #define TOD_2000 ((struct tod2000 *)(zTwoBase+0xDC0000)) #endif /* asm-m68k/amigahw.h */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/amigaints.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/amigaints.h?rev=1.1&content-type=text/x-cvsweb-markup Index: amigaints.h =================================================================== /* ** amigaints.h -- Amiga Linux interrupt handling structs and prototypes ** ** Copyright 1992 by Greg Harp ** ** This file is subject to the terms and conditions of the GNU General Public ** License. See the file COPYING in the main directory of this archive ** for more details. ** ** Created 10/2/92 by Greg Harp */ #ifndef _ASMm68k_AMIGAINTS_H_ #define _ASMm68k_AMIGAINTS_H_ /* ** Amiga Interrupt sources. ** */ #define NUM_AMIGA_SOURCES (24) /* vertical blanking interrupt */ #define IRQ_AMIGA_VERTB (IRQ_MACHSPEC | 0) /* copper interrupt */ #define IRQ_AMIGA_COPPER (IRQ_MACHSPEC | 1) /* Audio interrupts */ #define IRQ_AMIGA_AUD0 (IRQ_MACHSPEC | 2) #define IRQ_AMIGA_AUD1 (IRQ_MACHSPEC | 3) #define IRQ_AMIGA_AUD2 (IRQ_MACHSPEC | 4) #define IRQ_AMIGA_AUD3 (IRQ_MACHSPEC | 5) /* Blitter done interrupt */ #define IRQ_AMIGA_BLIT (IRQ_MACHSPEC | 6) /* floppy disk interrupts */ #define IRQ_AMIGA_DSKSYN (IRQ_MACHSPEC | 7) #define IRQ_AMIGA_DSKBLK (IRQ_MACHSPEC | 8) /* builtin serial port interrupts */ #define IRQ_AMIGA_RBF (IRQ_MACHSPEC | 9) #define IRQ_AMIGA_TBE (IRQ_MACHSPEC | 10) /* CIA interrupt sources */ #define IRQ_AMIGA_CIAA_TA (IRQ_MACHSPEC | 11) #define IRQ_AMIGA_CIAA_TB (IRQ_MACHSPEC | 12) #define IRQ_AMIGA_CIAA_ALRM (IRQ_MACHSPEC | 13) #define IRQ_AMIGA_CIAA_SP (IRQ_MACHSPEC | 14) #define IRQ_AMIGA_CIAA_FLG (IRQ_MACHSPEC | 15) #define IRQ_AMIGA_CIAB_TA (IRQ_MACHSPEC | 16) #define IRQ_AMIGA_CIAB_TB (IRQ_MACHSPEC | 17) #define IRQ_AMIGA_CIAB_ALRM (IRQ_MACHSPEC | 18) #define IRQ_AMIGA_CIAB_SP (IRQ_MACHSPEC | 19) #define IRQ_AMIGA_CIAB_FLG (IRQ_MACHSPEC | 20) #define IRQ_AMIGA_SOFT (IRQ_MACHSPEC | 21) #define IRQ_AMIGA_PORTS (IRQ_MACHSPEC | 22) #define IRQ_AMIGA_EXTER (IRQ_MACHSPEC | 23) #define IRQ_FLOPPY IRQ_AMIGA_DSKBLK /* INTREQR masks */ #define IRQ1_MASK 0x0007 /* INTREQR mask for IRQ 1 */ #define IRQ2_MASK 0x0008 /* INTREQR mask for IRQ 2 */ #define IRQ3_MASK 0x0070 /* INTREQR mask for IRQ 3 */ #define IRQ4_MASK 0x0780 /* INTREQR mask for IRQ 4 */ #define IRQ5_MASK 0x1800 /* INTREQR mask for IRQ 5 */ #define IRQ6_MASK 0x2000 /* INTREQR mask for IRQ 6 */ #define IRQ7_MASK 0x4000 /* INTREQR mask for IRQ 7 */ #define IF_SETCLR 0x8000 /* set/clr bit */ #define IF_INTEN 0x4000 /* master interrupt bit in INT* registers */ #define IF_EXTER 0x2000 /* external level 6 and CIA B interrupt */ #define IF_DSKSYN 0x1000 /* disk sync interrupt */ #define IF_RBF 0x0800 /* serial receive buffer full interrupt */ #define IF_AUD3 0x0400 /* audio channel 3 done interrupt */ #define IF_AUD2 0x0200 /* audio channel 2 done interrupt */ #define IF_AUD1 0x0100 /* audio channel 1 done interrupt */ #define IF_AUD0 0x0080 /* audio channel 0 done interrupt */ #define IF_BLIT 0x0040 /* blitter done interrupt */ #define IF_VERTB 0x0020 /* vertical blanking interrupt */ #define IF_COPER 0x0010 /* copper interrupt */ #define IF_PORTS 0x0008 /* external level 2 and CIA A interrupt */ #define IF_SOFT 0x0004 /* software initiated interrupt */ #define IF_DSKBLK 0x0002 /* diskblock DMA finished */ #define IF_TBE 0x0001 /* serial transmit buffer empty interrupt */ /* CIA interrupt control register bits */ #define CIA_ICR_TA 0x01 #define CIA_ICR_TB 0x02 #define CIA_ICR_ALRM 0x04 #define CIA_ICR_SP 0x08 #define CIA_ICR_FLG 0x10 #endif /* asm-m68k/amigaints.h */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/amigamouse.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/amigamouse.h?rev=1.1&content-type=text/x-cvsweb-markup Index: amigamouse.h =================================================================== #ifndef _ASMm68k_AMIGAMOUSE_H #define _ASMm68k_AMIGAMOUSE_H /* * linux/include/asm-m68k/amigamouse.h: header file for Amiga Mouse driver * by Michael Rausch */ /* #define MSE_INT_OFF() outb(MSE_DISABLE_INTERRUPTS, MSE_CONTROL_PORT) #define MSE_INT_ON() outb(MSE_ENABLE_INTERRUPTS, MSE_CONTROL_PORT) */ struct mouse_status { unsigned char buttons; unsigned char latch_buttons; int dx; int dy; int present; int ready; int active; struct wait_queue *wait; struct fasync_struct *fasyncptr; }; #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/amigardb.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/amigardb.h?rev=1.1&content-type=text/x-cvsweb-markup Index: amigardb.h =================================================================== #ifndef _LINUX_AMIGARDB_H #define _LINUX_AMIGARDB_H 1 #define ULONG u_long #define LONG long #define UBYTE u_char /* definitions for the Amiga RigidDiskBlock layout, which always starts in cylinder 0 of a medium. Taken from page 254f of the RKM: Devices */ struct RigidDiskBlock { ULONG rdb_ID; /* 4 character identifier */ ULONG rdb_SummedLongs; /* size of this checksummed structure */ LONG rdb_ChkSum; /* block checksum (longword sum to zero) */ ULONG rdb_HostID; /* SCSI Target ID of host */ ULONG rdb_BlockBytes; /* size of disk blocks */ ULONG rdb_Flags; /* see below for defines */ /* block list heads */ ULONG rdb_BadBlockList; /* optional bad block list */ ULONG rdb_PartitionList; /* optional first partition block */ ULONG rdb_FileSysHeaderList; /* optional file system header block */ ULONG rdb_DriveInit; /* optional drive-specific init code */ /* DriveInit(lun,rdb,ior): "C" stk & d0/a0/a1 */ ULONG rdb_Reserved1[6]; /* set to $ffffffff */ /* physical drive characteristics */ ULONG rdb_Cylinders; /* number of drive cylinders */ ULONG rdb_Sectors; /* sectors per track */ ULONG rdb_Heads; /* number of drive heads */ ULONG rdb_Interleave; /* interleave */ ULONG rdb_Park; /* landing zone cylinder */ ULONG rdb_Reserved2[3]; ULONG rdb_WritePreComp; /* starting cylinder: write precompensation */ ULONG rdb_ReducedWrite; /* starting cylinder: reduced write current */ ULONG rdb_StepRate; /* drive step rate */ ULONG rdb_Reserved3[5]; /* logical drive characteristics */ ULONG rdb_RDBBlocksLo; /* low block of range reserved for hardblocks */ ULONG rdb_RDBBlocksHi; /* high block of range for these hardblocks */ ULONG rdb_LoCylinder; /* low cylinder of partitionable disk area */ ULONG rdb_HiCylinder; /* high cylinder of partitionable data area */ ULONG rdb_CylBlocks; /* number of blocks available per cylinder */ ULONG rdb_AutoParkSeconds; /* zero for no auto park */ ULONG rdb_HighRDSKBlock; /* highest block used by RDSK */ /* (not including replacement bad blocks) */ ULONG rdb_Reserved4; /* drive identification */ char rdb_DiskVendor[8]; char rdb_DiskProduct[16]; char rdb_DiskRevision[4]; char rdb_ControllerVendor[8]; char rdb_ControllerProduct[16]; char rdb_ControllerRevision[4]; ULONG rdb_Reserved5[10]; }; #define IDNAME_RIGIDDISK 0x5244534B /* 'RDSK' */ #define RDB_LOCATION_LIMIT 16 #define RDBFB_LAST 0 /* no disks exist to be configured after */ #define RDBFF_LAST 0x01L /* this one on this controller */ #define RDBFB_LASTLUN 1 /* no LUNs exist to be configured greater */ #define RDBFF_LASTLUN 0x02L /* than this one at this SCSI Target ID */ #define RDBFB_LASTTID 2 /* no Target IDs exist to be configured */ #define RDBFF_LASTTID 0x04L /* greater than this one on this SCSI bus */ #define RDBFB_NORESELECT 3 /* don't bother trying to perform reselection */ #define RDBFF_NORESELECT 0x08L /* when talking to this drive */ #define RDBFB_DISKID 4 /* rdb_Disk... identification valid */ #define RDBFF_DISKID 0x10L #define RDBFB_CTRLRID 5 /* rdb_Controller... identification valid */ #define RDBFF_CTRLRID 0x20L /* added 7/20/89 by commodore: */ #define RDBFB_SYNCH 6 /* drive supports scsi synchronous mode */ #define RDBFF_SYNCH 0x40L /* CAN BE DANGEROUS TO USE IF IT DOESN'T! */ struct PartitionBlock { ULONG pb_ID; /* 4 character identifier */ ULONG pb_SummedLongs; /* size of this checksummed structure */ LONG pb_ChkSum; /* block checksum (longword sum to zero) */ ULONG pb_HostID; /* SCSI Target ID of host */ ULONG pb_Next; /* block number of the next PartitionBlock */ ULONG pb_Flags; /* see below for defines */ ULONG pb_Reserved1[2]; ULONG pb_DevFlags; /* preferred flags for OpenDevice */ UBYTE pb_DriveName[32]; /* preferred DOS device name: BSTR form */ /* (not used if this name is in use) */ ULONG pb_Reserved2[15]; /* filler to 32 longwords */ ULONG pb_Environment[17]; /* environment vector for this partition */ ULONG pb_EReserved[15]; /* reserved for future environment vector */ }; #define IDNAME_PARTITION 0x50415254 /* 'PART' */ #define PBFB_BOOTABLE 0 /* this partition is intended to be bootable */ #define PBFF_BOOTABLE 1L /* (expected directories and files exist) */ #define PBFB_NOMOUNT 1 /* do not mount this partition (e.g. manually */ #define PBFF_NOMOUNT 2L /* mounted, but space reserved here) */ /* this is from <dos/filehandler.h> */ #define DE_TABLESIZE 0 /* minimum value is 11 (includes NumBuffers) */ #define DE_SIZEBLOCK 1 /* in longwords: standard value is 128 */ #define DE_SECORG 2 /* not used; must be 0 */ #define DE_NUMHEADS 3 /* # of heads (surfaces). drive specific */ #define DE_SECSPERBLK 4 /* not used; must be 1 */ #define DE_BLKSPERTRACK 5 /* blocks per track. drive specific */ #define DE_RESERVEDBLKS 6 /* unavailable blocks at start. usually 2 */ #define DE_PREFAC 7 /* not used; must be 0 */ #define DE_INTERLEAVE 8 /* usually 0 */ #define DE_LOWCYL 9 /* starting cylinder. typically 0 */ #define DE_UPPERCYL 10 /* max cylinder. drive specific */ #define DE_NUMBUFFERS 11 /* starting # of buffers. typically 5 */ #define DE_MEMBUFTYPE 12 /* type of mem to allocate for buffers. */ #define DE_BUFMEMTYPE 12 /* same as above, better name * 1 is public, 3 is chip, 5 is fast */ #define DE_MAXTRANSFER 13 /* Max number bytes to transfer at a time */ #define DE_MASK 14 /* Address Mask to block out certain memory */ #define DE_BOOTPRI 15 /* Boot priority for autoboot */ #define DE_DOSTYPE 16 /* ASCII (HEX) string showing filesystem type; * 0X444F5300 is old filesystem, * 0X444F5301 is fast file system */ #define DE_BAUD 17 /* Baud rate for serial handler */ #define DE_CONTROL 18 /* Control word for handler/filesystem */ #define DE_BOOTBLOCKS 19 /* Number of blocks containing boot code */ #endif /* _LINUX_AMIGARDB_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/amigatypes.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/amigatypes.h?rev=1.1&content-type=text/x-cvsweb-markup Index: amigatypes.h =================================================================== /* ** linux/amigatypes.h -- Types used in Amiga Linux kernel source ** ** Copyright 1992 by Greg Harp ** ** This file is subject to the terms and conditions of the GNU General Public ** License. See the file COPYING in the main directory of this archive ** for more details. ** ** Created 09/29/92 by Greg Harp ** ** Moved all Zorro definitions to asm/zorro.h which is where they ** really belong - 24/11/95 Jes Sorensen */ #ifndef _LINUX_AMIGATYPES_H_ #define _LINUX_AMIGATYPES_H_ #ifdef __KERNEL__ /* only if compiling the kernel */ #include <linux/types.h> #endif /* * Different models of Amiga */ #define AMI_UNKNOWN (0) #define AMI_500 (1) #define AMI_500PLUS (2) #define AMI_600 (3) #define AMI_1000 (4) #define AMI_1200 (5) #define AMI_2000 (6) #define AMI_2500 (7) #define AMI_3000 (8) #define AMI_3000T (9) #define AMI_3000PLUS (10) #define AMI_4000 (11) #define AMI_4000T (12) #define AMI_CDTV (13) #define AMI_CD32 (14) #define AMI_DRACO (15) /* * chipsets */ #define CS_STONEAGE (0) #define CS_OCS (1) #define CS_ECS (2) #define CS_AGA (3) /* * Amiga clocks */ extern u_long amiga_masterclock; /* 28 MHz */ extern u_long amiga_colorclock; /* 3.5 MHz */ #define amiga_eclock boot_info.bi_amiga.eclock /* 700 kHz */ #endif /* asm-m68k/amigatypes.h */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/amihdreg.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/amihdreg.h?rev=1.1&content-type=text/x-cvsweb-markup Index: amihdreg.h =================================================================== #ifndef _LINUX_AMIHDREG_H #define _LINUX_AMIHDREG_H /* * This file contains some defines for the Amiga IDE hd controller. * Various sources. Check out some definitions (see comments with * a ques). */ #define IDE_DISABLE_IRQ 0x02 #define IDE_ENABLE_IRQ 0x00 /* Bases of the hard drive controller */ #define HD_BASE_A4000 0xdd2020 #define HD_BASE_A1200 0xda0000 /* Offsets from one of the above bases */ #define AMI_HD_ERROR (0x06) /* see err-bits */ #define AMI_HD_NSECTOR (0x0a) /* nr of sectors to read/write */ #define AMI_HD_SECTOR (0x0e) /* starting sector */ #define AMI_HD_LCYL (0x12) /* starting cylinder */ #define AMI_HD_HCYL (0x16) /* high byte of starting cyl */ #define AMI_HD_SELECT (0x1a) /* 101dhhhh , d=drive, hhhh=head */ #define AMI_HD_STATUS (0x1e) /* see status-bits */ #define AMI_HD_CMD (0x101a) /* These are at different offsets from the base */ #define HD_A4000_IRQ (0xdd3020) /* MSB = 1, Harddisk is source of interrupt */ #define HD_A1200_IRQ (0xda9000) /* MSB = 1, Harddisk is source of interrupt */ #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atafd.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atafd.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atafd.h =================================================================== #ifndef _ASM_M68K_FD_H #define _ASM_M68K_FD_H /* Definitions for the Atari Floppy driver */ struct atari_format_descr { int track; /* to be formatted */ int head; /* "" "" */ int sect_offset; /* offset of first sector */ }; #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atafdreg.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atafdreg.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atafdreg.h =================================================================== #ifndef _LINUX_FDREG_H #define _LINUX_FDREG_H /* ** WD1772 stuff */ /* register codes */ #define FDCSELREG_STP (0x80) /* command/status register */ #define FDCSELREG_TRA (0x82) /* track register */ #define FDCSELREG_SEC (0x84) /* sector register */ #define FDCSELREG_DTA (0x86) /* data register */ /* register names for FDC_READ/WRITE macros */ #define FDCREG_CMD 0 #define FDCREG_STATUS 0 #define FDCREG_TRACK 2 #define FDCREG_SECTOR 4 #define FDCREG_DATA 6 /* command opcodes */ #define FDCCMD_RESTORE (0x00) /* - */ #define FDCCMD_SEEK (0x10) /* | */ #define FDCCMD_STEP (0x20) /* | TYP 1 Commands */ #define FDCCMD_STIN (0x40) /* | */ #define FDCCMD_STOT (0x60) /* - */ #define FDCCMD_RDSEC (0x80) /* - TYP 2 Commands */ #define FDCCMD_WRSEC (0xa0) /* - " */ #define FDCCMD_RDADR (0xc0) /* - */ #define FDCCMD_RDTRA (0xe0) /* | TYP 3 Commands */ #define FDCCMD_WRTRA (0xf0) /* - */ #define FDCCMD_FORCI (0xd0) /* - TYP 4 Command */ /* command modifier bits */ #define FDCCMDADD_SR6 (0x00) /* step rate settings */ #define FDCCMDADD_SR12 (0x01) #define FDCCMDADD_SR2 (0x02) #define FDCCMDADD_SR3 (0x03) #define FDCCMDADD_V (0x04) /* verify */ #define FDCCMDADD_H (0x08) /* wait for spin-up */ #define FDCCMDADD_U (0x10) /* update track register */ #define FDCCMDADD_M (0x10) /* multiple sector access */ #define FDCCMDADD_E (0x04) /* head settling flag */ #define FDCCMDADD_P (0x02) /* precompensation off */ #define FDCCMDADD_A0 (0x01) /* DAM flag */ /* status register bits */ #define FDCSTAT_MOTORON (0x80) /* motor on */ #define FDCSTAT_WPROT (0x40) /* write protected (FDCCMD_WR*) */ #define FDCSTAT_SPINUP (0x20) /* motor speed stable (Type I) */ #define FDCSTAT_DELDAM (0x20) /* sector has deleted DAM (Type II+III) */ #define FDCSTAT_RECNF (0x10) /* record not found */ #define FDCSTAT_CRC (0x08) /* CRC error */ #define FDCSTAT_TR00 (0x04) /* Track 00 flag (Type I) */ #define FDCSTAT_LOST (0x04) /* Lost Data (Type II+III) */ #define FDCSTAT_IDX (0x02) /* Index status (Type I) */ #define FDCSTAT_DRQ (0x02) /* DRQ status (Type II+III) */ #define FDCSTAT_BUSY (0x01) /* FDC is busy */ /* PSG Port A Bit Nr 0 .. Side Sel .. 0 -> Side 1 1 -> Side 2 */ #define DSKSIDE (0x01) #define DSKDRVNONE (0x06) #define DSKDRV0 (0x02) #define DSKDRV1 (0x04) /* step rates */ #define FDCSTEP_6 0x00 #define FDCSTEP_12 0x01 #define FDCSTEP_2 0x02 #define FDCSTEP_3 0x03 #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_SCCserial.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_SCCserial.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atari_SCCserial.h =================================================================== #ifndef _ATARI_SCCSERIAL_H #define _ATARI_SCCSERIAL_H /* Special configuration ioctls for the Atari SCC5380 Serial * Communications Controller */ /* ioctl command codes */ #define TIOCGATSCC 0x54c0 /* get SCC configuration */ #define TIOCSATSCC 0x54c1 /* set SCC configuration */ #define TIOCDATSCC 0x54c2 /* reset configuration to defaults */ /* Clock sources */ #define CLK_RTxC 0 #define CLK_TRxC 1 #define CLK_PCLK 2 /* baud_bases for the common clocks in the Atari. These are the real * frequencies divided by 16. */ #define SCC_BAUD_BASE_TIMC 19200 /* 0.3072 MHz from TT-MFP, Timer C */ #define SCC_BAUD_BASE_BCLK 153600 /* 2.4576 MHz */ #define SCC_BAUD_BASE_PCLK4 229500 /* 3.6720 MHz */ #define SCC_BAUD_BASE_PCLK 503374 /* 8.0539763 MHz */ #define SCC_BAUD_BASE_NONE 0 /* for not connected or unused * clock sources */ /* The SCC configuration structure */ struct atari_SCCserial { unsigned RTxC_base; /* base_baud of RTxC */ unsigned TRxC_base; /* base_baud of TRxC */ unsigned PCLK_base; /* base_baud of PCLK, for both channels! */ struct { unsigned clksrc; /* CLK_RTxC, CLK_TRxC or CLK_PCLK */ unsigned divisor; /* divisor for base baud, valid values: * see below */ } baud_table[17]; /* For 50, 75, 110, 135, 150, 200, 300, * 600, 1200, 1800, 2400, 4800, 9600, * 19200, 38400, 57600 and 115200 bps. The * last two could be replaced by other * rates > 38400 if they're not possible. */ }; /* The following divisors are valid: * * - CLK_RTxC: 1 or even (1, 2 and 4 are the direct modes, > 4 use * the BRG) * * - CLK_TRxC: 1, 2 or 4 (no BRG, only direct modes possible) * * - CLK_PCLK: >= 4 and even (no direct modes, only BRG) * */ #endif /* _ATARI_SCCSERIAL_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_joystick.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_joystick.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atari_joystick.h =================================================================== #ifndef _LINUX_ATARI_JOYSTICK_H #define _LINUX_ATARI_JOYSTICK_H /* * linux/include/linux/atari_joystick.h * header file for Atari Joystick driver * by Robert de Vries (robert@a...) on 19Jul93 */ void atari_joystick_interrupt(char*); int atari_joystick_init(void); extern int atari_mouse_buttons; struct joystick_status { char fire; char dir; int ready; int active; struct wait_queue *wait; }; #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_mouse.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_mouse.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atari_mouse.h =================================================================== #ifndef _LINUX_ATARI_MOUSE_H #define _LINUX_ATARI_MOUSE_H /* * linux/include/linux/atari_mouse.h * header file for Atari Mouse driver * by Robert de Vries (robert@a...) on 19Jul93 */ struct mouse_status { char buttons; short dx; short dy; int ready; int active; struct wait_queue *wait; struct fasync_struct *fasyncptr; }; #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_rootsec.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_rootsec.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atari_rootsec.h =================================================================== #ifndef _LINUX_ATARI_ROOTSEC_H #define _LINUX_ATARI_ROOTSEC_H /* * linux/include/linux/atari_rootsec.h * definitions for Atari Rootsector layout * by Andreas Schwab (schwab@l...) * * modified for ICD/Supra partitioning scheme restricted to at most 12 * partitions * by Guenther Kelleter (guenther@p...) */ struct partition_info { u_char flg; /* bit 0: active; bit 7: bootable */ char id[3]; /* "GEM", "BGM", "XGM", or other */ u_long st; /* start of partition */ u_long siz; /* length of partition */ }; struct rootsector { char unused[0x156]; /* room for boot code */ struct partition_info icdpart[8]; /* info for ICD-partitions 5..12 */ char unused2[0xc]; u_long hd_siz; /* size of disk in blocks */ struct partition_info part[4]; u_long bsl_st; /* start of bad sector list */ u_long bsl_cnt; /* length of bad sector list */ u_short checksum; /* checksum for bootable disks */ }; #endif /* _LINUX_ATARI_ROOTSEC_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_stdma.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atari_stdma.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atari_stdma.h =================================================================== #ifndef _atari_stdma_h #define _atari_stdma_h #include <asm/irq.h> /***************************** Prototypes *****************************/ void stdma_lock(isrfunc isr, void *data); void stdma_release( void ); int stdma_others_waiting( void ); int stdma_islocked( void ); void *stdma_locked_by( void ); void stdma_init( void ); /************************* End of Prototypes **************************/ #endif /* _atari_stdma_h */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atarihdreg.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atarihdreg.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atarihdreg.h =================================================================== #ifndef _LINUX_ATAHDREG_H #define _LINUX_ATAHDREG_H /* * This file contains some defines for the Falcon IDE hd controller. * Various sources. Check out some definitions (see comments with * a ques). */ #define ATA_HD_BASE 0xfff00000 #define ATA_HD_DATA 0x00 /* _CTL when writing */ #define ATA_HD_ERROR 0x05 /* see err-bits */ #define ATA_HD_NSECTOR 0x09 /* nr of sectors to read/write */ #define ATA_HD_SECTOR 0x0d /* starting sector */ #define ATA_HD_LCYL 0x11 /* starting cylinder */ #define ATA_HD_HCYL 0x15 /* high byte of starting cyl */ #define ATA_HD_CURRENT 0x19 /* 101dhhhh , d=drive, hhhh=head */ #define ATA_HD_STATUS 0x1d /* see status-bits */ #define ATA_HD_CMD 0x39 #define ATA_HD_ALTSTATUS 0x39 /* same as HD_STATUS but doesn't clear irq */ #endif /* _LINUX_ATAHDREG_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atarihw.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atarihw.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atarihw.h =================================================================== /* ** linux/atarihw.h -- This header defines some macros and pointers for ** the various Atari custom hardware registers. ** ** Copyright 1994 by Bj”rn Brauel ** ** 5/1/94 Roman Hodek: ** Added definitions for TT specific chips. ** ** This file is subject to the terms and conditions of the GNU General Public ** License. See the file COPYING in the main directory of this archive ** for more details. ** */ #ifndef _LINUX_ATARIHW_H_ #define _LINUX_ATARIHW_H_ #include <linux/types.h> /* Reading the MFP port register gives a machine independent delay, since the * MFP always has a 8 MHz clock. This avoids problems with the varying length * of nops on various machines. Somebody claimed that the tstb takes 600 ns. */ #define MFPDELAY() \ __asm__ __volatile__ ( "tstb %0" : : "m" (mfp.par_dt_reg) : "cc" ); /* Memory used for screen ram and stdma buffers */ void atari_stram_init (void); void *atari_stram_alloc (long size, unsigned long *start_mem ); void atari_stram_free (void *); extern int is_medusa; /* Do cache push/invalidate for DMA read/write. This function obeys the * snooping on some machines (Medusa) and processors: The Medusa itself can * snoop, but only the '040 can source data from its cache to DMA writes i.e., * reads from memory). Both '040 and '060 invalidate cache entries on snooped * DMA reads (i.e., writes to memory). */ #include <linux/mm.h> #include <asm/pgtable.h> static inline void dma_cache_maintenance( unsigned long paddr, unsigned long len, int writeflag ) { if (writeflag) { if (!is_medusa || m68k_is040or060 == 6) cache_push( paddr, len ); } else { if (!is_medusa) cache_clear( paddr, len ); } } /* ** Shifter */ #define ST_LOW 0 #define ST_MID 1 #define ST_HIGH 2 #define TT_LOW 7 #define TT_MID 4 #define TT_HIGH 6 #define SHF_BAS (0xffff8200) struct SHIFTER { u_char pad1; u_char bas_hi; u_char pad2; u_char bas_md; u_char pad3; u_char volatile vcounthi; u_char pad4; u_char volatile vcountmid; u_char pad5; u_char volatile vcountlow; u_char volatile syncmode; u_char pad6; u_char pad7; u_char bas_lo; }; # define shifter ((*(volatile struct SHIFTER *)SHF_BAS)) #define SHF_FBAS (0xffff820e) struct SHIFTER_F030 { u_short off_next; u_short scn_width; }; # define shifter_f030 ((*(volatile struct SHIFTER_F030 *)SHF_FBAS)) #define SHF_TBAS (0xffff8200) struct SHIFTER_TT { u_char char_dummy0; u_char bas_hi; /* video mem base addr, high and mid byte */ u_char char_dummy1; u_char bas_md; u_char char_dummy2; u_char vcount_hi; /* pointer to currently displayed byte */ u_char char_dummy3; u_char vcount_md; u_char char_dummy4; u_char vcount_lo; u_short st_sync; /* ST compatible sync mode register, unused */ u_char char_dummy5; u_char bas_lo; /* video mem addr, low byte */ u_char char_dummy6[2+3*16]; /* $ffff8240: */ u_short color_reg[16]; /* 16 color registers */ u_char st_shiftmode; /* ST compatible shift mode register, unused */ u_char char_dummy7; u_short tt_shiftmode; /* TT shift mode register */ }; #define shifter_tt ((*(volatile struct SHIFTER_TT *)SHF_TBAS)) /* values for shifter_tt->tt_shiftmode */ #define TT_SHIFTER_STLOW 0x0000 #define TT_SHIFTER_STMID 0x0100 #define TT_SHIFTER_STHIGH 0x0200 #define TT_SHIFTER_TTLOW 0x0700 #define TT_SHIFTER_TTMID 0x0400 #define TT_SHIFTER_TTHIGH 0x0600 #define TT_SHIFTER_MODEMASK 0x0700 #define TT_SHIFTER_NUMMODE 0x0008 #define TT_SHIFTER_PALETTE_MASK 0x000f #define TT_SHIFTER_GRAYMODE 0x1000 /* 256 TT palette registers */ #define TT_PALETTE_BASE (0xffff8400) #define tt_palette ((volatile u_short *)TT_PALETTE_BASE) #define TT_PALETTE_RED_MASK 0x0f00 #define TT_PALETTE_GREEN_MASK 0x00f0 #define TT_PALETTE_BLUE_MASK 0x000f /* ** Falcon030 VIDEL Video Controller ** for description see File 'linux\tools\atari\hardware.txt */ #define f030_col ((u_long *) 0xffff9800) #define f030_xreg ((u_short*) 0xffff8282) #define f030_yreg ((u_short*) 0xffff82a2) #define f030_creg ((u_short*) 0xffff82c0) #define f030_sreg ((u_short*) 0xffff8260) #define f030_mreg ((u_short*) 0xffff820a) #define f030_linewidth ((u_short*) 0xffff820e) #define f030_hscroll ((u_char*) 0xffff8265) #define VIDEL_BAS (0xffff8260) struct VIDEL { u_short st_shift; u_short pad1; u_char xoffset_s; u_char xoffset; u_short f_shift; u_char pad2[0x1a]; u_short hht; u_short hbb; u_short hbe; u_short hdb; u_short hde; u_short hss; u_char pad3[0x14]; u_short vft; u_short vbb; u_short vbe; u_short vdb; u_short vde; u_short vss; u_char pad4[0x12]; u_short control; u_short mode; }; #define videl ((*(volatile struct VIDEL *)VIDEL_BAS)) /* ** DMA/WD1772 Disk Controller */ #define FWD_BAS (0xffff8604) struct DMA_WD { u_short fdc_acces_seccount; u_short dma_mode_status; u_char dma_vhi; /* Some extended ST-DMAs can handle 32 bit addresses */ u_char dma_hi; u_char char_dummy2; u_char dma_md; u_char char_dummy3; u_char dma_lo; u_short fdc_speed; }; # define dma_wd ((*(volatile struct DMA_WD *)FWD_BAS)) /* alias */ #define st_dma dma_wd /* The two highest bytes of an extended DMA as a short; this is a must * for the Medusa. */ #define st_dma_ext_dmahi (*((volatile unsigned short *)0xffff8608)) /* ** YM2149 Sound Chip ** access in bytes */ #define YM_BAS (0xffff8800) struct SOUND_YM { u_char rd_data_reg_sel; u_char char_dummy1; u_char wd_data; }; #define sound_ym ((*(volatile struct SOUND_YM *)YM_BAS)) /* TT SCSI DMA */ #define TT_SCSI_DMA_BAS (0xffff8700) struct TT_DMA { u_char char_dummy0; u_char dma_addr_hi; u_char char_dummy1; u_char dma_addr_hmd; u_char char_dummy2; u_char dma_addr_lmd; u_char char_dummy3; u_char dma_addr_lo; u_char char_dummy4; u_char dma_cnt_hi; u_char char_dummy5; u_char dma_cnt_hmd; u_char char_dummy6; u_char dma_cnt_lmd; u_char char_dummy7; u_char dma_cnt_lo; u_long dma_restdata; u_short dma_ctrl; }; #define tt_scsi_dma ((*(volatile struct TT_DMA *)TT_SCSI_DMA_BAS)) /* TT SCSI Controller 5380 */ #define TT_5380_BAS (0xffff8781) struct TT_5380 { u_char scsi_data; u_char char_dummy1; u_char scsi_icr; u_char char_dummy2; u_char scsi_mode; u_char char_dummy3; u_char scsi_tcr; u_char char_dummy4; u_char scsi_idstat; u_char char_dummy5; u_char scsi_dmastat; u_char char_dummy6; u_char scsi_targrcv; u_char char_dummy7; u_char scsi_inircv; }; #define tt_scsi ((*(volatile struct TT_5380 *)TT_5380_BAS)) #define tt_scsi_regp ((volatile char *)TT_5380_BAS) /* ** Falcon DMA Sound Subsystem ** not implemented yet */ /* ** Falcon Blitter */ #define BLT_BAS (0xffff8a00) struct BLITTER { u_short halftone[16]; u_short src_x_inc; u_short src_y_inc; u_long src_address; u_short endmask1; u_short endmask2; u_short endmask3; u_short dst_x_inc; u_short dst_y_inc; u_long dst_address; u_short wd_per_line; u_short ln_per_bb; u_short hlf_op_reg; u_short log_op_reg; u_short lin_nm_reg; u_short skew_reg; }; # define blitter ((*(volatile struct BLITTER *)BLT_BAS)) /* ** SCC Z8530 */ #define SCC_BAS (0xffff8c81) struct SCC { u_char cha_a_ctrl; u_char char_dummy1; u_char cha_a_data; u_char char_dummy2; u_char cha_b_ctrl; u_char char_dummy3; u_char cha_b_data; }; # define scc ((*(volatile struct SCC*)SCC_BAS)) /* The ESCC (Z85230) in an Atari ST. The channels are revered! */ # define st_escc ((*(volatile struct SCC*)0xfffffa31)) # define st_escc_dsr ((*(volatile char *)0xfffffa39)) /* TT SCC DMA Controller (same chip as SCSI DMA) */ #define TT_SCC_DMA_BAS (0xffff8c01) #define tt_scc_dma ((*(volatile struct TT_DMA *)TT_SCC_DMA_BAS)) /* ** VIDEL Palette Register */ #define FPL_BAS (0xffff9800) struct VIDEL_PALETTE { u_long reg[256]; }; # define videl_palette ((*(volatile struct VIDEL_PALETTE*)FPL_BAS)) /* ** Falcon DSP Host Interface ** not implemented yet */ /* ** MFP 68901 */ #define MFP_BAS (0xfffffa01) struct MFP { u_char par_dt_reg; u_char char_dummy1; u_char active_edge; u_char char_dummy2; u_char data_dir; u_char char_dummy3; u_char int_en_a; u_char char_dummy4; u_char int_en_b; u_char char_dummy5; u_char int_pn_a; u_char char_dummy6; u_char int_pn_b; u_char char_dummy7; u_char int_sv_a; u_char char_dummy8; u_char int_sv_b; u_char char_dummy9; u_char int_mk_a; u_char char_dummy10; u_char int_mk_b; u_char char_dummy11; u_char vec_adr; u_char char_dummy12; u_char tim_ct_a; u_char char_dummy13; u_char tim_ct_b; u_char char_dummy14; u_char tim_ct_cd; u_char char_dummy15; u_char tim_dt_a; u_char char_dummy16; u_char tim_dt_b; u_char char_dummy17; u_char tim_dt_c; u_char char_dummy18; u_char tim_dt_d; u_char char_dummy19; u_char sync_char; u_char char_dummy20; u_char usart_ctr; u_char char_dummy21; u_char rcv_stat; u_char char_dummy22; u_char trn_stat; u_char char_dummy23; u_char usart_dta; }; # define mfp ((*(volatile struct MFP*)MFP_BAS)) /* TT's second MFP */ #define TT_MFP_BAS (0xfffffa81) # define tt_mfp ((*(volatile struct MFP*)TT_MFP_BAS)) /* TT System Control Unit */ #define TT_SCU_BAS (0xffff8e01) struct TT_SCU { u_char sys_mask; u_char char_dummy1; u_char sys_stat; u_char char_dummy2; u_char softint; u_char char_dummy3; u_char vmeint; u_char char_dummy4; u_char gp_reg1; u_char char_dummy5; u_char gp_reg2; u_char char_dummy6; u_char vme_mask; u_char char_dummy7; u_char vme_stat; }; #define tt_scu ((*(volatile struct TT_SCU *)TT_SCU_BAS)) /* TT real time clock */ #define TT_RTC_BAS (0xffff8961) struct TT_RTC { u_char regsel; u_char dummy; u_char data; }; #define tt_rtc ((*(volatile struct TT_RTC *)TT_RTC_BAS)) /* ** ACIA 6850 */ /* constants for the ACIA registers */ /* baudrate selection and reset (Baudrate = clock/factor) */ #define ACIA_DIV1 0 #define ACIA_DIV16 1 #define ACIA_DIV64 2 #define ACIA_RESET 3 /* character format */ #define ACIA_D7E2S (0<<2) /* 7 data, even parity, 2 stop */ #define ACIA_D7O2S (1<<2) /* 7 data, odd parity, 2 stop */ #define ACIA_D7E1S (2<<2) /* 7 data, even parity, 1 stop */ #define ACIA_D7O1S (3<<2) /* 7 data, odd parity, 1 stop */ #define ACIA_D8N2S (4<<2) /* 8 data, no parity, 2 stop */ #define ACIA_D8N1S (5<<2) /* 8 data, no parity, 1 stop */ #define ACIA_D8E1S (6<<2) /* 8 data, even parity, 1 stop */ #define ACIA_D8O1S (7<<2) /* 8 data, odd parity, 1 stop */ /* transmit control */ #define ACIA_RLTID (0<<5) /* RTS low, TxINT disabled */ #define ACIA_RLTIE (1<<5) /* RTS low, TxINT enabled */ #define ACIA_RHTID (2<<5) /* RTS high, TxINT disabled */ #define ACIA_RLTIDSB (3<<5) /* RTS low, TxINT disabled, send break */ /* receive control */ #define ACIA_RID (0<<7) /* RxINT disabled */ #define ACIA_RIE (1<<7) /* RxINT enabled */ /* status fields of the ACIA */ #define ACIA_RDRF 1 /* Receive Data Register Full */ #define ACIA_TDRE (1<<1) /* Transmit Data Register Empty */ #define ACIA_DCD (1<<2) /* Data Carrier Detect */ #define ACIA_CTS (1<<3) /* Clear To Send */ #define ACIA_FE (1<<4) /* Framing Error */ #define ACIA_OVRN (1<<5) /* Receiver Overrun */ #define ACIA_PE (1<<6) /* Parity Error */ #define ACIA_IRQ (1<<7) /* Interrupt Request */ #define ACIA_BAS (0xfffffc00) struct ACIA { u_char key_ctrl; u_char char_dummy1; u_char key_data; u_char char_dummy2; u_char mid_ctrl; u_char char_dummy3; u_char mid_data; }; # define acia ((*(volatile struct ACIA*)ACIA_BAS)) #define TT_DMASND_BAS (0xffff8900) struct TT_DMASND { u_char int_ctrl; /* Falcon: Interrupt control */ u_char ctrl; u_char pad2; u_char bas_hi; u_char pad3; u_char bas_mid; u_char pad4; u_char bas_low; u_char pad5; u_char addr_hi; u_char pad6; u_char addr_mid; u_char pad7; u_char addr_low; u_char pad8; u_char end_hi; u_char pad9; u_char end_mid; u_char pad10; u_char end_low; u_char pad11[12]; u_char track_select; /* Falcon */ u_char mode; u_char pad12[14]; /* Falcon only: */ u_short cbar_src; u_short cbar_dst; u_char ext_div; u_char int_div; u_char rec_track_select; u_char dac_src; u_char adc_src; u_char input_gain; u_short output_atten; }; # define tt_dmasnd ((*(volatile struct TT_DMASND *)TT_DMASND_BAS)) #define DMASND_CTRL_OFF 0x00 #define DMASND_CTRL_ON 0x01 #define DMASND_CTRL_REPEAT 0x02 #define DMASND_MODE_MONO 0x80 #define DMASND_MODE_STEREO 0x00 #define DMASND_MODE_8BIT 0x00 #define DMASND_MODE_16BIT 0x40 /* Falcon only */ #define DMASND_MODE_6KHZ 0x00 /* Falcon: mute */ #define DMASND_MODE_12KHZ 0x01 #define DMASND_MODE_25KHZ 0x02 #define DMASND_MODE_50KHZ 0x03 #define DMASNDSetBase(bufstart) \ do { \ tt_dmasnd.bas_hi = (unsigned char)(((bufstart) & 0xff0000) >> 16); \ tt_dmasnd.bas_mid = (unsigned char)(((bufstart) & 0x00ff00) >> 8); \ tt_dmasnd.bas_low = (unsigned char) ((bufstart) & 0x0000ff); \ } while( 0 ) #define DMASNDGetAdr() ((tt_dmasnd.addr_hi << 16) + \ (tt_dmasnd.addr_mid << 8) + \ (tt_dmasnd.addr_low)) #define DMASNDSetEnd(bufend) \ do { \ tt_dmasnd.end_hi = (unsigned char)(((bufend) & 0xff0000) >> 16); \ tt_dmasnd.end_mid = (unsigned char)(((bufend) & 0x00ff00) >> 8); \ tt_dmasnd.end_low = (unsigned char) ((bufend) & 0x0000ff); \ } while( 0 ) #define TT_MICROWIRE_BAS (0xffff8922) struct TT_MICROWIRE { u_short data; u_short mask; }; # define tt_microwire ((*(volatile struct TT_MICROWIRE *)TT_MICROWIRE_BAS)) #define MW_LM1992_ADDR 0x0400 #define MW_LM1992_VOLUME(dB) \ (0x0c0 | ((dB) < -80 ? 0 : (dB) > 0 ? 40 : (((dB) + 80) / 2))) #define MW_LM1992_BALLEFT(dB) \ (0x140 | ((dB) < -40 ? 0 : (dB) > 0 ? 20 : (((dB) + 40) / 2))) #define MW_LM1992_BALRIGHT(dB) \ (0x100 | ((dB) < -40 ? 0 : (dB) > 0 ? 20 : (((dB) + 40) / 2))) #define MW_LM1992_TREBLE(dB) \ (0x080 | ((dB) < -12 ? 0 : (dB) > 12 ? 12 : (((dB) / 2) + 6))) #define MW_LM1992_BASS(dB) \ (0x040 | ((dB) < -12 ? 0 : (dB) > 12 ? 12 : (((dB) / 2) + 6))) #define MW_LM1992_PSG_LOW 0x000 #define MW_LM1992_PSG_HIGH 0x001 #define MW_LM1992_PSG_OFF 0x002 #define MSTE_RTC_BAS (0xfffffc21) struct MSTE_RTC { u_char sec_ones; u_char dummy1; u_char sec_tens; u_char dummy2; u_char min_ones; u_char dummy3; u_char min_tens; u_char dummy4; u_char hr_ones; u_char dummy5; u_char hr_tens; u_char dummy6; u_char weekday; u_char dummy7; u_char day_ones; u_char dummy8; u_char day_tens; u_char dummy9; u_char mon_ones; u_char dummy10; u_char mon_tens; u_char dummy11; u_char year_ones; u_char dummy12; u_char year_tens; u_char dummy13; u_char mode; u_char dummy14; u_char test; u_char dummy15; u_char reset; }; #define mste_rtc ((*(volatile struct MSTE_RTC *)MSTE_RTC_BAS)) #endif /* linux/atarihw.h */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atariints.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atariints.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atariints.h =================================================================== /* ** atariints.h -- Atari Linux interrupt handling structs and prototypes ** ** Copyright 1994 by Bj”rn Brauel ** ** 5/2/94 Roman Hodek: ** TT interrupt definitions added. ** ** 12/02/96: (Roman) ** Adapted to new int handling scheme (see ataints.c); revised numbering ** ** This file is subject to the terms and conditions of the GNU General Public ** License. See the file COPYING in the main directory of this archive ** for more details. ** */ #ifndef _LINUX_ATARIINTS_H_ #define _LINUX_ATARIINTS_H_ #include <asm/irq.h> #include <asm/atarihw.h> /* ** Atari Interrupt sources. ** */ #define STMFP_SOURCE_BASE 8 #define TTMFP_SOURCE_BASE 24 #define SCC_SOURCE_BASE 40 #define VME_SOURCE_BASE 56 #define VME_MAX_SOURCES 16 #define NUM_ATARI_SOURCES (VME_SOURCE_BASE+VME_MAX_SOURCES-STMFP_SOURCE_BASE) /* convert vector number to int source number */ #define IRQ_VECTOR_TO_SOURCE(v) ((v) - ((v) < 0x20 ? 0x18 : (0x40-8))) /* convert irq_handler index to vector number */ #define IRQ_SOURCE_TO_VECTOR(i) ((i) + ((i) < 8 ? 0x18 : (0x40-8))) /* interrupt service types */ #define IRQ_TYPE_SLOW 0 #define IRQ_TYPE_FAST 1 #define IRQ_TYPE_PRIO 2 #define IRQ_SPURIOUS (IRQ_MACHSPEC | 0) /* auto-vector interrupts */ #define IRQ_AUTO_1 (IRQ_MACHSPEC | 1) #define IRQ_AUTO_2 (IRQ_MACHSPEC | 2) #define IRQ_AUTO_3 (IRQ_MACHSPEC | 3) #define IRQ_AUTO_4 (IRQ_MACHSPEC | 4) #define IRQ_AUTO_5 (IRQ_MACHSPEC | 5) #define IRQ_AUTO_6 (IRQ_MACHSPEC | 6) #define IRQ_AUTO_7 (IRQ_MACHSPEC | 7) /* ST-MFP interrupts */ #define IRQ_MFP_BUSY (IRQ_MACHSPEC | 8) #define IRQ_MFP_DCD (IRQ_MACHSPEC | 9) #define IRQ_MFP_CTS (IRQ_MACHSPEC | 10) #define IRQ_MFP_GPU (IRQ_MACHSPEC | 11) #define IRQ_MFP_TIMD (IRQ_MACHSPEC | 12) #define IRQ_MFP_TIMC (IRQ_MACHSPEC | 13) #define IRQ_MFP_ACIA (IRQ_MACHSPEC | 14) #define IRQ_MFP_FDC (IRQ_MACHSPEC | 15) #define IRQ_MFP_ACSI IRQ_MFP_FDC #define IRQ_MFP_FSCSI IRQ_MFP_FDC #define IRQ_MFP_IDE IRQ_MFP_FDC #define IRQ_MFP_TIMB (IRQ_MACHSPEC | 16) #define IRQ_MFP_SERERR (IRQ_MACHSPEC | 17) #define IRQ_MFP_SEREMPT (IRQ_MACHSPEC | 18) #define IRQ_MFP_RECERR (IRQ_MACHSPEC | 19) #define IRQ_MFP_RECFULL (IRQ_MACHSPEC | 20) #define IRQ_MFP_TIMA (IRQ_MACHSPEC | 21) #define IRQ_MFP_RI (IRQ_MACHSPEC | 22) #define IRQ_MFP_MMD (IRQ_MACHSPEC | 23) /* TT-MFP interrupts */ #define IRQ_TT_MFP_IO0 (IRQ_MACHSPEC | 24) #define IRQ_TT_MFP_IO1 (IRQ_MACHSPEC | 25) #define IRQ_TT_MFP_SCC (IRQ_MACHSPEC | 26) #define IRQ_TT_MFP_RI (IRQ_MACHSPEC | 27) #define IRQ_TT_MFP_TIMD (IRQ_MACHSPEC | 28) #define IRQ_TT_MFP_TIMC (IRQ_MACHSPEC | 29) #define IRQ_TT_MFP_DRVRDY (IRQ_MACHSPEC | 30) #define IRQ_TT_MFP_SCSIDMA (IRQ_MACHSPEC | 31) #define IRQ_TT_MFP_TIMB (IRQ_MACHSPEC | 32) #define IRQ_TT_MFP_SERERR (IRQ_MACHSPEC | 33) #define IRQ_TT_MFP_SEREMPT (IRQ_MACHSPEC | 34) #define IRQ_TT_MFP_RECERR (IRQ_MACHSPEC | 35) #define IRQ_TT_MFP_RECFULL (IRQ_MACHSPEC | 36) #define IRQ_TT_MFP_TIMA (IRQ_MACHSPEC | 37) #define IRQ_TT_MFP_RTC (IRQ_MACHSPEC | 38) #define IRQ_TT_MFP_SCSI (IRQ_MACHSPEC | 39) /* SCC interrupts */ #define IRQ_SCCB_TX (IRQ_MACHSPEC | 40) #define IRQ_SCCB_STAT (IRQ_MACHSPEC | 42) #define IRQ_SCCB_RX (IRQ_MACHSPEC | 44) #define IRQ_SCCB_SPCOND (IRQ_MACHSPEC | 46) #define IRQ_SCCA_TX (IRQ_MACHSPEC | 48) #define IRQ_SCCA_STAT (IRQ_MACHSPEC | 50) #define IRQ_SCCA_RX (IRQ_MACHSPEC | 52) #define IRQ_SCCA_SPCOND (IRQ_MACHSPEC | 54) #define INT_CLK 24576 /* CLK while int_clk =2.456MHz and divide = 100 */ #define INT_TICKS 246 /* to make sched_time = 99.902... HZ */ #define MFP_ENABLE 0 #define MFP_PENDING 1 #define MFP_SERVICE 2 #define MFP_MASK 3 /* Utility functions for setting/clearing bits in the interrupt registers of * the MFP. 'type' should be constant, if 'irq' is constant, too, code size is * reduced. set_mfp_bit() is nonsense for PENDING and SERVICE registers. */ static inline int get_mfp_bit( unsigned irq, int type ) { unsigned char mask, *reg; mask = 1 << (irq & 7); reg = (unsigned char *)&mfp.int_en_a + type*4 + ((irq & 8) >> 2) + (((irq-8) & 16) << 3); return( *reg & mask ); } static inline void set_mfp_bit( unsigned irq, int type ) { unsigned char mask, *reg; mask = 1 << (irq & 7); reg = (unsigned char *)&mfp.int_en_a + type*4 + ((irq & 8) >> 2) + (((irq-8) & 16) << 3); __asm__ __volatile__ ( "orb %0,%1" : : "di" (mask), "m" (*reg) : "memory" ); } static inline void clear_mfp_bit( unsigned irq, int type ) { unsigned char mask, *reg; mask = ~(1 << (irq & 7)); reg = (unsigned char *)&mfp.int_en_a + type*4 + ((irq & 8) >> 2) + (((irq-8) & 16) << 3); if (type == MFP_PENDING || type == MFP_SERVICE) __asm__ __volatile__ ( "moveb %0,%1" : : "di" (mask), "m" (*reg) : "memory" ); else __asm__ __volatile__ ( "andb %0,%1" : : "di" (mask), "m" (*reg) : "memory" ); } /* * {en,dis}able_irq have the usual semantics of temporary blocking the * interrupt, but not loosing requests that happen between disabling and * enabling. This is done with the MFP mask registers. */ static inline void atari_enable_irq( unsigned irq ) { irq &= ~IRQ_MACHSPEC; if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; set_mfp_bit( irq, MFP_MASK ); } static inline void atari_disable_irq( unsigned irq ) { irq &= ~IRQ_MACHSPEC; if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; clear_mfp_bit( irq, MFP_MASK ); } /* * In opposite to {en,dis}able_irq, requests between turn{off,on}_irq are not * "stored" */ extern inline void atari_turnon_irq( unsigned irq ) { irq &= ~IRQ_MACHSPEC; if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; set_mfp_bit( irq, MFP_ENABLE ); } extern inline void atari_turnoff_irq( unsigned irq ) { irq &= ~IRQ_MACHSPEC; if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; clear_mfp_bit( irq, MFP_ENABLE ); clear_mfp_bit( irq, MFP_PENDING ); } extern inline void atari_clear_pending_irq( unsigned irq ) { irq &= ~IRQ_MACHSPEC; if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; clear_mfp_bit( irq, MFP_PENDING ); } extern inline int atari_irq_pending( unsigned irq ) { irq &= ~IRQ_MACHSPEC; if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return( 0 ); return( get_mfp_bit( irq, MFP_PENDING ) ); } unsigned long atari_register_vme_int( void ); #endif /* linux/atariints.h */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atarikb.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atarikb.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atarikb.h =================================================================== /* ** atarikb.h -- This header contains the prototypes of functions of ** the intelligent keyboard of the Atari needed by the ** mouse and joystick drivers. ** ** Copyright 1994 by Robert de Vries ** ** This file is subject to the terms and conditions of the GNU General Public ** License. See the file COPYING in the main directory of this archive ** for more details. ** ** Created: 20 Feb 1994 by Robert de Vries */ #ifndef _LINUX_ATARIKB_H #define _LINUX_ATARIKB_H void ikbd_write(const char *, int); void ikbd_mouse_button_action(int mode); void ikbd_mouse_rel_pos(void); void ikbd_mouse_abs_pos(int xmax, int ymax); void ikbd_mouse_kbd_mode(int dx, int dy); void ikbd_mouse_thresh(int x, int y); void ikbd_mouse_scale(int x, int y); void ikbd_mouse_pos_get(int *x, int *y); void ikbd_mouse_pos_set(int x, int y); void ikbd_mouse_y0_bot(void); void ikbd_mouse_y0_top(void); void ikbd_mouse_disable(void); void ikbd_joystick_event_on(void); void ikbd_joystick_event_off(void); void ikbd_joystick_get_state(void); void ikbd_joystick_disable(void); /* Hook for MIDI serial driver */ extern void (*atari_MIDI_interrupt_hook) (void); /* Hook for mouse driver */ extern void (*atari_mouse_interrupt_hook) (char *); #endif /* _LINUX_ATARIKB_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/atomic.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/atomic.h?rev=1.1&content-type=text/x-cvsweb-markup Index: atomic.h =================================================================== #ifndef __ARCH_M68K_ATOMIC__ #define __ARCH_M68K_ATOMIC__ /* * Atomic operations that C can't guarantee us. Useful for * resource counting etc.. */ /* * We do not have SMP m68k systems, so we don't have to deal with that. */ typedef int atomic_t; static __inline__ void atomic_add(atomic_t i, atomic_t *v) { __asm__ __volatile__("addl %1,%0" : : "m" (*v), "id" (i)); } static __inline__ void atomic_sub(atomic_t i, atomic_t *v) { __asm__ __volatile__("subl %1,%0" : : "m" (*v), "id" (i)); } static __inline__ void atomic_inc(atomic_t *v) { __asm__ __volatile__("addql #1,%0" : : "m" (*v)); } static __inline__ void atomic_dec(atomic_t *v) { __asm__ __volatile__("subql #1,%0" : : "m" (*v)); } static __inline__ int atomic_dec_and_test(atomic_t *v) { char c; __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c) : "m" (*v)); return c != 0; } #endif /* __ARCH_M68K_ATOMIC __ */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/bitops.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/bitops.h?rev=1.1&content-type=text/x-cvsweb-markup Index: bitops.h =================================================================== #ifndef _M68K_BITOPS_H #define _M68K_BITOPS_H /* * Copyright 1992, Linus Torvalds. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ /* * Require 68020 or better. * * They use the standard big-endian m680x0 bit ordering. */ extern __inline__ int set_bit(int nr,void * vaddr) { char retval; __asm__ __volatile__ ("bfset %2@{%1:#1}; sne %0" : "=d" (retval) : "d" (nr^31), "a" (vaddr)); return retval; } extern __inline__ int clear_bit(int nr, void * vaddr) { char retval; __asm__ __volatile__ ("bfclr %2@{%1:#1}; sne %0" : "=d" (retval) : "d" (nr^31), "a" (vaddr)); return retval; } extern __inline__ int change_bit(int nr, void * vaddr) { char retval; __asm__ __volatile__ ("bfchg %2@{%1:#1}; sne %0" : "=d" (retval) : "d" (nr^31), "a" (vaddr)); return retval; } extern __inline__ int test_bit(int nr, const void * vaddr) { return ((1UL << (nr & 31)) & (((const unsigned int *) vaddr)[nr >> 5])) != 0; } extern __inline__ int find_first_zero_bit(void * vaddr, unsigned size) { unsigned long *p = vaddr, *addr = vaddr; unsigned long allones = ~0UL; int res; unsigned long num; if (!size) return 0; while (*p++ == allones) { if (size <= 32) return (p - addr) << 5; size -= 32; } num = ~*--p; __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); return ((p - addr) << 5) + (res ^ 31); } extern __inline__ int find_next_zero_bit (void *vaddr, int size, int offset) { unsigned long *addr = vaddr; unsigned long *p = addr + (offset >> 5); int set = 0, bit = offset & 31UL, res; if (offset >= size) return size; if (bit) { unsigned long num = ~*p & (~0UL << bit); /* Look for zero in first longword */ __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); if (res < 32) return (offset & ~31UL) + (res ^ 31); set = 32 - bit; p++; } /* No zero yet, search remaining full bytes for a zero */ res = find_first_zero_bit (p, size - 32 * (p - addr)); return (offset + set + res); } /* * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ extern __inline__ unsigned long ffz(unsigned long word) { int res; __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (~word & -~word)); return res ^ 31; } /* Bitmap functions for the minix filesystem */ extern __inline__ int minix_find_first_zero_bit (const void *vaddr, unsigned size) { const unsigned short *p = vaddr, *addr = vaddr; int res; unsigned short num; if (!size) return 0; while (*p++ == 0xffff) { if (size <= 16) return (p - addr) << 4; size -= 16; } num = ~*--p; __asm__ __volatile__ ("bfffo %1{#16,#16},%0" : "=d" (res) : "d" (num & -num)); return ((p - addr) << 4) + (res ^ 31); } extern __inline__ int minix_set_bit (int nr, void *vaddr) { char retval; __asm__ __volatile__ ("bfset %2{%1:#1}; sne %0" : "=d" (retval) : "d" (nr^15), "m" (*(char *)vaddr)); return retval; } extern __inline__ int minix_clear_bit (int nr, void *vaddr) { char retval; __asm__ __volatile__ ("bfclr %2{%1:#1}; sne %0" : "=d" (retval) : "d" (nr^15), "m" (*(char *) vaddr)); return retval; } extern __inline__ int minix_test_bit (int nr, const void *vaddr) { return ((1U << (nr & 15)) & (((const unsigned short *) vaddr)[nr >> 4])) != 0; } /* Bitmap functions for the ext2 filesystem. */ extern __inline__ int ext2_set_bit (int nr, void *vaddr) { char retval; __asm__ __volatile__ ("bfset %2{%1,#1}; sne %0" : "=d" (retval) : "d" (nr^7), "m" (*(char *) vaddr)); return retval; } extern __inline__ int ext2_clear_bit (int nr, void *vaddr) { char retval; __asm__ __volatile__ ("bfclr %2{%1,#1}; sne %0" : "=d" (retval) : "d" (nr^7), "m" (*(char *) vaddr)); return retval; } extern __inline__ int ext2_test_bit (int nr, const void *vaddr) { return ((1U << (nr & 7)) & (((const unsigned char *) vaddr)[nr >> 3])) != 0; } extern __inline__ int ext2_find_first_zero_bit (const void *vaddr, unsigned size) { const unsigned long *p = vaddr, *addr = vaddr; int res; if (!size) return 0; while (*p++ == ~0UL) { if (size <= 32) return (p - addr) << 5; size -= 32; } --p; for (res = 0; res < 32; res++) if (!ext2_test_bit (res, p)) break; return (p - addr) * 32 + res; } extern __inline__ int ext2_find_next_zero_bit (const void *vaddr, unsigned size, unsigned offset) { const unsigned long *addr = vaddr; const unsigned long *p = addr + (offset >> 5); int bit = offset & 31UL, res; if (offset >= size) return size; if (bit) { /* Look for zero in first longword */ for (res = bit; res < 32; res++) if (!ext2_test_bit (res, p)) return (p - addr) * 32 + res; p++; } /* No zero yet, search remaining full bytes for a zero */ res = ext2_find_first_zero_bit (p, size - 32 * (p - addr)); return (p - addr) * 32 + res; } #endif /* _M68K_BITOPS_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/bootinfo.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/bootinfo.h?rev=1.1&content-type=text/x-cvsweb-markup Index: bootinfo.h =================================================================== /* ** asm/bootinfo.h -- Definition of the Linux/68K boot information structure ** ** Copyright 1992 by Greg Harp ** ** This file is subject to the terms and conditions of the GNU General Public ** License. See the file COPYING in the main directory of this archive ** for more details. ** ** Created 09/29/92 by Greg Harp ** ** 5/2/94 Roman Hodek: ** Added bi_atari part of the machine dependent union bi_un; for now it ** contains just a model field to distinguish between TT and Falcon. */ #ifndef BOOTINFO_H #define BOOTINFO_H #include <asm/zorro.h> /* * Amiga specific part of bootinfo structure. */ #define NUM_AUTO 16 #ifndef __ASSEMBLY__ #define AMIGAHW_DECLARE(name) unsigned name : 1 #define AMIGAHW_SET(name) (boot_info.bi_amiga.hw_present.name = 1) #define AMIGAHW_PRESENT(name) (boot_info.bi_amiga.hw_present.name) struct bi_Amiga { int model; /* Amiga Model (3000?) */ int num_autocon; /* # of autoconfig devices found */ struct ConfigDev autocon[NUM_AUTO]; /* up to 16 autoconfig devices */ #ifdef HACKER_KERNEL void (*exit_func)(void); /* addr of function to exit kernel */ unsigned long chip_addr; /* start of chip memory (bytes) */ #endif unsigned long chip_size; /* size of chip memory (bytes) */ unsigned char vblank; /* VBLANK frequency */ unsigned char psfreq; /* power supply frequency */ unsigned long eclock; /* EClock frequency */ unsigned long chipset; /* native chipset present */ struct { /* video hardware */ AMIGAHW_DECLARE(AMI_VIDEO); /* Amiga Video */ AMIGAHW_DECLARE(AMI_BLITTER); /* Amiga Blitter */ AMIGAHW_DECLARE(AMBER_FF); /* Amber Flicker Fixer */ /* sound hardware */ AMIGAHW_DECLARE(AMI_AUDIO); /* Amiga Audio */ /* disk storage interfaces */ AMIGAHW_DECLARE(AMI_FLOPPY); /* Amiga Floppy */ AMIGAHW_DECLARE(A3000_SCSI); /* SCSI (wd33c93, A3000 alike) */ AMIGAHW_DECLARE(A4000_SCSI); /* SCSI (ncr53c710, A4000T alike) */ AMIGAHW_DECLARE(A1200_IDE); /* IDE (A1200 alike) */ AMIGAHW_DECLARE(A4000_IDE); /* IDE (A4000 alike) */ AMIGAHW_DECLARE(CD_ROM); /* CD ROM drive */ /* other I/O hardware */ AMIGAHW_DECLARE(AMI_KEYBOARD); /* Amiga Keyboard */ AMIGAHW_DECLARE(AMI_MOUSE); /* Amiga Mouse */ AMIGAHW_DECLARE(AMI_SERIAL); /* Amiga Serial */ AMIGAHW_DECLARE(AMI_PARALLEL); /* Amiga Parallel */ /* real time clocks */ AMIGAHW_DECLARE(A2000_CLK); /* Hardware Clock (A2000 alike) */ AMIGAHW_DECLARE(A3000_CLK); /* Hardware Clock (A3000 alike) */ /* supporting hardware */ AMIGAHW_DECLARE(CHIP_RAM); /* Chip RAM */ AMIGAHW_DECLARE(PAULA); /* Paula (8364) */ AMIGAHW_DECLARE(DENISE); /* Denise (8362) */ AMIGAHW_DECLARE(DENISE_HR); /* Denise (8373) */ AMIGAHW_DECLARE(LISA); /* Lisa (8375) */ AMIGAHW_DECLARE(AGNUS_PAL); /* Normal/Fat PAL Agnus (8367/8371) */ AMIGAHW_DECLARE(AGNUS_NTSC); /* Normal/Fat NTSC Agnus (8361/8370) */ AMIGAHW_DECLARE(AGNUS_HR_PAL); /* Fat Hires PAL Agnus (8372) */ AMIGAHW_DECLARE(AGNUS_HR_NTSC); /* Fat Hires NTSC Agnus (8372) */ AMIGAHW_DECLARE(ALICE_PAL); /* PAL Alice (8374) */ AMIGAHW_DECLARE(ALICE_NTSC); /* NTSC Alice (8374) */ AMIGAHW_DECLARE(MAGIC_REKICK); /* A3000 Magic Hard Rekick */ AMIGAHW_DECLARE(ZORRO); /* Zorro AutoConfig */ } hw_present; }; #else /* __ASSEMBLY__ */ BI_amiga_model = BI_un BI_amiga_num_autcon = BI_amiga_model+4 BI_amiga_autocon = BI_amiga_num_autcon+4 #ifdef HACKER_KERNEL BI_amiga_exit_func = BI_amiga_autocon+(CD_sizeof*NUM_AUTO) BI_amiga_chip_addr = BI_amiga_exit_func+4 BI_amiga_chip_size = BI_amiga_chip_addr+4 #else BI_amiga_chip_size = BI_amiga_autocon+(CD_sizeof*NUM_AUTO) #endif BI_amiga_vblank = BI_amiga_chip_size+4 BI_amiga_psfreq = BI_amiga_vblank+1 BI_amiga_eclock = BI_amiga_psfreq+1 BI_amiga_chipset = BI_amiga_eclock+4 BI_amiga_hw_present = BI_amiga_chipset+4 #endif /* __ASSEMBLY__ */ /* Atari specific part of bootinfo */ /* * Define several Hardware-Chips for indication so that for the ATARI we do * no longer decide whether it is a Falcon or other machine . It's just * important what hardware the machine uses */ /* ++roman 08/08/95: rewritten from ORing constants to a C bitfield */ #ifndef __ASSEMBLY__ #define ATARIHW_DECLARE(name) unsigned name : 1 #define ATARIHW_SET(name) (boot_info.bi_atari.hw_present.name = 1) #define ATARIHW_PRESENT(name) (boot_info.bi_atari.hw_present.name) struct bi_Atari { struct { /* video hardware */ ATARIHW_DECLARE(STND_SHIFTER); /* ST-Shifter - no base low ! */ ATARIHW_DECLARE(EXTD_SHIFTER); /* STe-Shifter - 24 bit address */ ATARIHW_DECLARE(TT_SHIFTER); /* TT-Shifter */ ATARIHW_DECLARE(VIDEL_SHIFTER); /* Falcon-Shifter */ /* sound hardware */ ATARIHW_DECLARE(YM_2149); /* Yamaha YM 2149 */ ATARIHW_DECLARE(PCM_8BIT); /* PCM-Sound in STe-ATARI */ ATARIHW_DECLARE(CODEC); /* CODEC Sound (Falcon) */ /* disk storage interfaces */ ATARIHW_DECLARE(TT_SCSI); /* Directly mapped NCR5380 */ ATARIHW_DECLARE(ST_SCSI); /* NCR5380 via ST-DMA (Falcon) */ ATARIHW_DECLARE(ACSI); /* Standard ACSI like in STs */ ATARIHW_DECLARE(IDE); /* IDE Interface */ ATARIHW_DECLARE(FDCSPEED); /* 8/16 MHz switch for FDC */ /* other I/O hardware */ ATARIHW_DECLARE(ST_MFP); /* The ST-MFP (there should be no Atari without it... but who knows?) */ ATARIHW_DECLARE(TT_MFP); /* 2nd MFP */ ATARIHW_DECLARE(SCC); /* Serial Communications Contr. */ ATARIHW_DECLARE(ST_ESCC); /* SCC Z83230 in an ST */ ATARIHW_DECLARE(ANALOG_JOY); /* Paddle Interface for STe and Falcon */ ATARIHW_DECLARE(MICROWIRE); /* Microwire Interface */ /* DMA */ ATARIHW_DECLARE(STND_DMA); /* 24 Bit limited ST-DMA */ ATARIHW_DECLARE(EXTD_DMA); /* 32 Bit ST-DMA */ ATARIHW_DECLARE(SCSI_DMA); /* DMA for the NCR5380 */ ATARIHW_DECLARE(SCC_DMA); /* DMA for the SCC */ /* real time clocks */ ATARIHW_DECLARE(TT_CLK); /* TT compatible clock chip */ ATARIHW_DECLARE(MSTE_CLK); /* Mega ST(E) clock chip */ /* supporting hardware */ ATARIHW_DECLARE(SCU); /* System Control Unit */ ATARIHW_DECLARE(BLITTER); /* Blitter */ ATARIHW_DECLARE(VME); /* VME Bus */ } hw_present; unsigned long mch_cookie; /* _MCH cookie from TOS */ }; /* mch_cookie values (upper word) */ #define ATARI_MCH_ST 0 #define ATARI_MCH_STE 1 #define ATARI_MCH_TT 2 #define ATARI_MCH_FALCON 3 struct mem_info { unsigned long addr; /* physical address of memory chunk */ unsigned long size; /* length of memory chunk (in bytes) */ }; #else /* __ASSEMBLY__ */ MI_addr = 0 MI_size = MI_addr+4 MI_sizeof = MI_size+4 #endif /* __ASSEMBLY__ */ #define NUM_MEMINFO 4 #define MACH_AMIGA 1 #define MACH_ATARI 2 #define MACH_MAC 3 /* * CPU and FPU types */ #define CPUB_68020 0 #define CPUB_68030 1 #define CPUB_68040 2 #define CPUB_68060 3 #define FPUB_68881 5 #define FPUB_68882 6 #define FPUB_68040 7 /* Internal FPU */ #define FPUB_68060 8 /* Internal FPU */ #define CPU_68020 (1<<CPUB_68020) #define CPU_68030 (1<<CPUB_68030) #define CPU_68040 (1<<CPUB_68040) #define CPU_68060 (1<<CPUB_68060) #define CPU_MASK (31) #define FPU_68881 (1<<FPUB_68881) #define FPU_68882 (1<<FPUB_68882) #define FPU_68040 (1<<FPUB_68040) /* Internal FPU */ #define FPU_68060 (1<<FPUB_68060) /* Internal FPU */ #define CL_SIZE (256) #ifndef __ASSEMBLY__ #define MACH_IS_AMIGA (boot_info.machtype == MACH_AMIGA) #define MACH_IS_ATARI (boot_info.machtype == MACH_ATARI) struct bootinfo { unsigned long machtype; /* machine type */ unsigned long cputype; /* system CPU & FPU */ struct mem_info memory[NUM_MEMINFO]; /* memory description */ int num_memory; /* # of memory blocks found */ unsigned long ramdisk_size; /* ramdisk size in 1024 byte blocks */ unsigned long ramdisk_addr; /* address of the ram disk in mem */ char command_line[CL_SIZE]; /* kernel command line parameters */ union { struct bi_Amiga bi_ami; /* Amiga specific information */ struct bi_Atari bi_ata; /* Atari specific information */ } bi_un; }; #define bi_amiga bi_un.bi_ami #define bi_atari bi_un.bi_ata #define bi_mac bi_un.bi_mac extern struct bootinfo boot_info; #else /* __ASSEMBLY__ */ BI_machtype = 0 BI_cputype = BI_machtype+4 BI_memory = BI_cputype+4 BI_num_memory = BI_memory+(MI_sizeof*NUM_MEMINFO) BI_ramdisk_size = BI_num_memory+4 BI_ramdisk_addr = BI_ramdisk_size+4 BI_command_line = BI_ramdisk_addr+4 BI_un = BI_command_line+CL_SIZE #endif /* __ASSEMBLY__ */ /* * Stuff for bootinfo interface versioning * * At the start of kernel code, a 'struct bootversion' is located. bootstrap * checks for a matching version of the interface before booting a kernel, to * avoid user confusion if kernel and bootstrap don't work together :-) * * If incompatible changes are made to the bootinfo interface, the major * number below should be stepped (and the minor reset to 0) for the * appropriate machine. If a change is backward-compatible, the minor should * be stepped. "Backwards-compatible" means that booting will work, but * certain features may not. */ #define BOOTINFOV_MAGIC 0x4249561A /* 'BIV^Z' */ #define MK_BI_VERSION(major,minor) (((major)<<16)+(minor)) #define BI_VERSION_MAJOR(v) (((v) >> 16) & 0xffff) #define BI_VERSION_MINOR(v) ((v) & 0xffff) #ifndef __ASSEMBLY__ struct bootversion { unsigned short branch; unsigned long magic; struct { unsigned long machtype; unsigned long version; } machversions[0]; }; #endif /* __ASSEMBLY__ */ #define AMIGA_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) #define ATARI_BOOTI_VERSION MK_BI_VERSION( 1, 0 ) #endif /* BOOTINFO_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/bugs.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/bugs.h?rev=1.1&content-type=text/x-cvsweb-markup Index: bugs.h =================================================================== /* * include/asm-m68k/bugs.h * * Copyright (C) 1994 Linus Torvalds */ /* * This is included by init/main.c to check for architecture-dependent bugs. * * Needs: * void check_bugs(void); */ static void check_bugs(void) { } 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/byteorder.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/byteorder.h?rev=1.1&content-type=text/x-cvsweb-markup Index: byteorder.h =================================================================== #ifndef _M68K_BYTEORDER_H #define _M68K_BYTEORDER_H #ifdef __KERNEL__ #define __BIG_ENDIAN #endif #define __BIG_ENDIAN_BITFIELD #define ntohl(x) x #define ntohs(x) x #define htonl(x) x #define htons(x) x #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/cachectl.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/cachectl.h?rev=1.1&content-type=text/x-cvsweb-markup Index: cachectl.h =================================================================== #ifndef _M68K_CACHECTL_H #define _M68K_CACHECTL_H /* Definitions for the cacheflush system call. */ #define FLUSH_SCOPE_LINE 1 /* Flush a cache line */ #define FLUSH_SCOPE_PAGE 2 /* Flush a page */ #define FLUSH_SCOPE_ALL 3 /* Flush the whole cache -- superuser only */ #define FLUSH_CACHE_DATA 1 /* Writeback and flush data cache */ #define FLUSH_CACHE_INSN 2 /* Flush instruction cache */ #define FLUSH_CACHE_BOTH 3 /* Flush both caches */ #endif /* _M68K_CACHECTL_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/checksum.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/checksum.h?rev=1.1&content-type=text/x-cvsweb-markup Index: checksum.h =================================================================== #ifndef _M68K_CHECKSUM_H #define _M68K_CHECKSUM_H /* * computes the checksum of a memory block at buff, length len, * and adds in "sum" (32-bit) * * returns a 32-bit number suitable for feeding into itself * or csum_tcpudp_magic * * this function must be called with even lengths, except * for the last fragment, which may be odd * * it's best to have buff aligned on a 32-bit boundary */ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); /* * the same as csum_partial_copy, but copies from src while it * checksums * * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum); /* * the same as csum_partial_copy, but copies from user space. * * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ unsigned int csum_partial_copy_fromuser(const char *src, char *dst, int len, int sum); /* * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. * */ static inline unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) { unsigned int sum = 0; __asm__ ("subqw #1,%2\n" "1:\t" "movel %1 at +,%/d0\n\t" "addxl %/d0,%0\n\t" "dbra %2,1b\n\t" "movel %0,%/d0\n\t" "swap %/d0\n\t" "addxw %/d0,%0\n\t" "clrw %/d0\n\t" "addxw %/d0,%0\n\t" : "=d" (sum), "=a" (iph), "=d" (ihl) : "0" (sum), "1" (iph), "2" (ihl) : "d0"); return ~sum; } /* * Fold a partial checksum */ static inline unsigned int csum_fold(unsigned int sum) { unsigned int tmp = sum; __asm__("swap %1\n\t" "addw %1, %0\n\t" "clrw %1\n\t" "addxw %1, %0" : "=&d" (sum), "=&d" (tmp) : "0" (sum), "1" (sum)); return ~sum; } /* * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, unsigned short proto, unsigned int sum) { __asm__ ("addl %1,%0\n\t" "addxl %4,%0\n\t" "addxl %5,%0\n\t" "clrl %1\n\t" "addxl %1,%0" : "=&d" (sum), "=&d" (saddr) : "0" (daddr), "1" (saddr), "d" (len + proto), "d"(sum)); return csum_fold(sum); } /* * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ static inline unsigned short ip_compute_csum(unsigned char * buff, int len) { return csum_fold (csum_partial(buff, len, 0)); } #endif /* _M68K_CHECKSUM_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/delay.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/delay.h?rev=1.1&content-type=text/x-cvsweb-markup Index: delay.h =================================================================== #ifndef _M68K_DELAY_H #define _M68K_DELAY_H /* * Copyright (C) 1994 Hamish Macdonald * * Delay routines, using a pre-computed "loops_per_second" value. */ extern __inline__ void __delay(int loops) { __asm__ __volatile__ ("\n\tmovel %0,%/d0\n1:\tsubql #1,%/d0\n\t" "bpls 1b\n" : /* no outputs */ : "g" (loops) : "d0"); } /* * Use only for very small delays ( < 1 msec). Should probably use a * lookup table, really, as the multiplications take much too long with * short delays. This is a "reasonable" implementation, though (and the * first constant multiplications gets optimized away if the delay is * a constant) */ extern __inline__ void udelay(unsigned long usecs) { usecs *= 0x000010c6; /* 2**32 / 1000000 */ __asm__ __volatile__ ("mulul %1,%0:%2" : "=d" (usecs) : "d" (usecs), "d" (loops_per_sec)); __delay(usecs); } extern __inline__ unsigned long muldiv(unsigned long a, unsigned long b, unsigned long c) { __asm__ ("mulul %1,%/d0:%0\n\tdivul %2,%/d0:%0" :"=d" (a) :"d" (b), "d" (c), "0" (a) :"d0"); return a; } #endif /* defined(_M68K_DELAY_H) */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/dma.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/dma.h?rev=1.1&content-type=text/x-cvsweb-markup Index: dma.h =================================================================== #ifndef _M68K_DMA_H #define _M68K_DMA_H 1 /* Don't define MAX_DMA_ADDRESS; it's useless on the m68k and any occurrence should be flagged as an error. */ #define MAX_DMA_CHANNELS 8 extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */ extern void free_dma(unsigned int dmanr); /* release it again */ #endif /* _M68K_DMA_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/elf.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/elf.h?rev=1.1&content-type=text/x-cvsweb-markup Index: elf.h =================================================================== #ifndef __ASMm68k_ELF_H #define __ASMm68k_ELF_H /* * ELF register definitions.. */ #include <asm/ptrace.h> typedef unsigned long elf_greg_t; #define ELF_NGREG 20 /* d1-d7/a0-a6/d0/usp/orig_d0/sr/pc/fmtvec */ typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef struct user_m68kfp_struct elf_fpregset_t; /* * This is used to ensure we don't load something for the wrong architecture. */ #define elf_check_arch(x) ((x) == EM_68K) /* * These are used to set parameters in the core dumps. */ #define ELF_CLASS ELFCLASS32 #define ELF_DATA ELFDATA2MSB; #define ELF_ARCH EM_68K /* For SVR4/m68k the function pointer to be registered with `atexit' is passed in %a1. Although my copy of the ABI has no such statement, it is actually used on ASV. */ #define ELF_PLAT_INIT(_r) _r->a1 = 0 #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 #define ELF_CORE_COPY_REGS(pr_reg, regs) \ /* Bleech. */ \ pr_reg[0] = regs->d1; \ pr_reg[1] = regs->d2; \ pr_reg[2] = regs->d3; \ pr_reg[3] = regs->d4; \ pr_reg[4] = regs->d5; \ pr_reg[7] = regs->a0; \ pr_reg[8] = regs->a1; \ pr_reg[14] = regs->d0; \ pr_reg[15] = rdusp(); \ pr_reg[16] = 0; /* orig_d0 */ \ pr_reg[17] = regs->sr; \ pr_reg[18] = regs->pc; \ { \ struct switch_stack *sw = ((struct switch_stack *)regs) - 1; \ pr_reg[5] = sw->d6; \ pr_reg[6] = sw->d7; \ pr_reg[9] = sw->a2; \ pr_reg[10] = sw->a3; \ pr_reg[11] = sw->a4; \ pr_reg[12] = sw->a5; \ pr_reg[13] = sw->a6; \ } #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/errno.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/errno.h?rev=1.1&content-type=text/x-cvsweb-markup Index: errno.h =================================================================== #ifndef _M68K_ERRNO_H #define _M68K_ERRNO_H #define EPERM 1 /* Operation not permitted */ #define ENOENT 2 /* No such file or directory */ #define ESRCH 3 /* No such process */ #define EINTR 4 /* Interrupted system call */ #define EIO 5 /* I/O error */ #define ENXIO 6 /* No such device or address */ #define E2BIG 7 /* Arg list too long */ #define ENOEXEC 8 /* Exec format error */ #define EBADF 9 /* Bad file number */ #define ECHILD 10 /* No child processes */ #define EAGAIN 11 /* Try again */ #define ENOMEM 12 /* Out of memory */ #define EACCES 13 /* Permission denied */ #define EFAULT 14 /* Bad address */ #define ENOTBLK 15 /* Block device required */ #define EBUSY 16 /* Device or resource busy */ #define EEXIST 17 /* File exists */ #define EXDEV 18 /* Cross-device link */ #define ENODEV 19 /* No such device */ #define ENOTDIR 20 /* Not a directory */ #define EISDIR 21 /* Is a directory */ #define EINVAL 22 /* Invalid argument */ #define ENFILE 23 /* File table overflow */ #define EMFILE 24 /* Too many open files */ #define ENOTTY 25 /* Not a typewriter */ #define ETXTBSY 26 /* Text file busy */ #define EFBIG 27 /* File too large */ #define ENOSPC 28 /* No space left on device */ #define ESPIPE 29 /* Illegal seek */ #define EROFS 30 /* Read-only file system */ #define EMLINK 31 /* Too many links */ #define EPIPE 32 /* Broken pipe */ #define EDOM 33 /* Math argument out of domain of func */ #define ERANGE 34 /* Math result not representable */ #define EDEADLK 35 /* Resource deadlock would occur */ #define ENAMETOOLONG 36 /* File name too long */ #define ENOLCK 37 /* No record locks available */ #define ENOSYS 38 /* Function not implemented */ #define ENOTEMPTY 39 /* Directory not empty */ #define ELOOP 40 /* Too many symbolic links encountered */ #define EWOULDBLOCK EAGAIN /* Operation would block */ #define ENOMSG 42 /* No message of desired type */ #define EIDRM 43 /* Identifier removed */ #define ECHRNG 44 /* Channel number out of range */ #define EL2NSYNC 45 /* Level 2 not synchronized */ #define EL3HLT 46 /* Level 3 halted */ #define EL3RST 47 /* Level 3 reset */ #define ELNRNG 48 /* Link number out of range */ #define EUNATCH 49 /* Protocol driver not attached */ #define ENOCSI 50 /* No CSI structure available */ #define EL2HLT 51 /* Level 2 halted */ #define EBADE 52 /* Invalid exchange */ #define EBADR 53 /* Invalid request descriptor */ #define EXFULL 54 /* Exchange full */ #define ENOANO 55 /* No anode */ #define EBADRQC 56 /* Invalid request code */ #define EBADSLT 57 /* Invalid slot */ #define EDEADLOCK 58 /* File locking deadlock error */ #define EBFONT 59 /* Bad font file format */ #define ENOSTR 60 /* Device not a stream */ #define ENODATA 61 /* No data available */ #define ETIME 62 /* Timer expired */ #define ENOSR 63 /* Out of streams resources */ #define ENONET 64 /* Machine is not on the network */ #define ENOPKG 65 /* Package not installed */ #define EREMOTE 66 /* Object is remote */ #define ENOLINK 67 /* Link has been severed */ #define EADV 68 /* Advertise error */ #define ESRMNT 69 /* Srmount error */ #define ECOMM 70 /* Communication error on send */ #define EPROTO 71 /* Protocol error */ #define EMULTIHOP 72 /* Multihop attempted */ #define EDOTDOT 73 /* RFS specific error */ #define EBADMSG 74 /* Not a data message */ #define EOVERFLOW 75 /* Value too large for defined data type */ #define ENOTUNIQ 76 /* Name not unique on network */ #define EBADFD 77 /* File descriptor in bad state */ #define EREMCHG 78 /* Remote address changed */ #define ELIBACC 79 /* Can not access a needed shared library */ #define ELIBBAD 80 /* Accessing a corrupted shared library */ #define ELIBSCN 81 /* .lib section in a.out corrupted */ #define ELIBMAX 82 /* Attempting to link in too many shared libraries */ #define ELIBEXEC 83 /* Cannot exec a shared library directly */ #define EILSEQ 84 /* Illegal byte sequence */ #define ERESTART 85 /* Interrupted system call should be restarted */ #define ESTRPIPE 86 /* Streams pipe error */ #define EUSERS 87 /* Too many users */ #define ENOTSOCK 88 /* Socket operation on non-socket */ #define EDESTADDRREQ 89 /* Destination address required */ #define EMSGSIZE 90 /* Message too long */ #define EPROTOTYPE 91 /* Protocol wrong type for socket */ #define ENOPROTOOPT 92 /* Protocol not available */ #define EPROTONOSUPPORT 93 /* Protocol not supported */ #define ESOCKTNOSUPPORT 94 /* Socket type not supported */ #define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ #define EPFNOSUPPORT 96 /* Protocol family not supported */ #define EAFNOSUPPORT 97 /* Address family not supported by protocol */ #define EADDRINUSE 98 /* Address already in use */ #define EADDRNOTAVAIL 99 /* Cannot assign requested address */ #define ENETDOWN 100 /* Network is down */ #define ENETUNREACH 101 /* Network is unreachable */ #define ENETRESET 102 /* Network dropped connection because of reset */ #define ECONNABORTED 103 /* Software caused connection abort */ #define ECONNRESET 104 /* Connection reset by peer */ #define ENOBUFS 105 /* No buffer space available */ #define EISCONN 106 /* Transport endpoint is already connected */ #define ENOTCONN 107 /* Transport endpoint is not connected */ #define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ #define ETOOMANYREFS 109 /* Too many references: cannot splice */ #define ETIMEDOUT 110 /* Connection timed out */ #define ECONNREFUSED 111 /* Connection refused */ #define EHOSTDOWN 112 /* Host is down */ #define EHOSTUNREACH 113 /* No route to host */ #define EALREADY 114 /* Operation already in progress */ #define EINPROGRESS 115 /* Operation now in progress */ #define ESTALE 116 /* Stale NFS file handle */ #define EUCLEAN 117 /* Structure needs cleaning */ #define ENOTNAM 118 /* Not a XENIX named type file */ #define ENAVAIL 119 /* No XENIX semaphores available */ #define EISNAM 120 /* Is a named type file */ #define EREMOTEIO 121 /* Remote I/O error */ #define EDQUOT 122 /* Quota exceeded */ #define ENOMEDIUM 123 /* No medium found */ #define EMEDIUMTYPE 124 /* Wrong medium type */ #endif /* _M68K_ERRNO_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-m68k/fcntl.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-m68k/fcntl.h?rev=1.1&content-type=text/x-cvsweb-markup Index: fcntl.h =================================================================== #ifndef _M68K_FCNTL_H #define _M68K_FCNTL_H /* open/fcntl - O_SYNC is only implemented on blocks devices and on files located on an ext2 file system */ #define O_ACCMODE 0003 #define O_RDONLY 00 #define O_WRONLY 01 #define O_RDWR 02 #define O_CREAT 0100 /* not fcntl */ #define O_EXCL 0200 /* not fcntl */ #define O_NOCTTY 0400 /* not fcntl */ #define O_TRUNC 01000 /* not fcntl */ #define O_APPEND 02000 #define O_NONBLOCK 04000 #define O_NDELAY O_NONBLOCK #define O_SYNC 010000 #define FASYNC 020000 /* fcntl, for BSD compatibility */ #define F_DUPFD 0 /* dup */ #define F_GETFD 1 /* get f_flags */ #define F_SETFD 2 /* set f_flags */ #define F_GETFL 3 /* more flags (cloexec) */ #define F_SETFL 4 #define F_GETLK 5 #define F_SETLK 6 #define F_SETLKW 7 #define F_SETOWN 8 /* for sockets. */ #define F_GETOWN 9 /* for sockets. */ /* for F_[GET|SET]FL */ #define FD_CLOEXEC 1 /* actuall