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From: cvs at opencores.org<cvs@o...>
Date: Tue Dec 20 12:35:57 CET 2005
Subject: [cvs-checkins] MODIFIED: or1k ...
Date: 00/05/12 20:12:35

Added: or1k/rc203soc/sw/uClinux/include/asm-or32 a.out.h atomic.h
bitops.h board.h bootinfo.h bugs.h byteorder.h
checksum.h delay.h dma.h elf.h errno.h fcntl.h
flat.h font.h io.h ioctl.h ioctls.h irq.h machdep.h
mc.h mman.h mmu_context.h page.h param.h pgtable.h
posix_types.h processor.h ptrace.h resource.h
segment.h semaphore.h shmparam.h sigcontext.h
signal.h socket.h sockios.h spr_defs.h stat.h
statfs.h string.h system.h termbits.h termios.h
traps.h types.h unaligned.h unistd.h user.h
Log:
First Import of RC20x uClinux


Revision Changes Path
1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/a.out.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/a.out.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: a.out.h
===================================================================
#ifndef __OR32_A_OUT_H__
#define __OR32_A_OUT_H__

struct exec
{
unsigned long a_info; /* Use macros N_MAGIC, etc for access */
unsigned a_text; /* length of text, in bytes */
unsigned a_data; /* length of data, in bytes */
unsigned a_bss; /* length of uninitialized data area for file, in bytes */
unsigned a_syms; /* length of symbol table data in file, in bytes */
unsigned a_entry; /* start address */
unsigned a_trsize; /* length of relocation info for text, in bytes */
unsigned a_drsize; /* length of relocation info for data, in bytes */
};

#define N_TRSIZE(a) ((a).a_trsize)
#define N_DRSIZE(a) ((a).a_drsize)
#define N_SYMSIZE(a) ((a).a_syms)

#ifdef __KERNEL__

#define STACK_TOP TASK_SIZE

#endif

#endif /* __OR32_A_OUT_H__ */



1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/atomic.h

http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/atomic.h?rev=1.1&content-type=text/x-cvsweb-markup

Index: atomic.h
===================================================================
#ifndef _ASM_OR32_ATOMIC_H
#define _ASM_OR32_ATOMIC_H

#include <linux/config.h>
#include <asm/system.h>

/*
* Atomic operations that C can't guarantee us. Useful for
* resource counting etc..
*/

typedef int atomic_t;

static __inline__ void atomic_add(atomic_t i, atomic_t *v)
{
unsigned long flags;

save_flags(flags); cli();
*v += i;
restore_flags(flags);
}

static __inline__ void atomic_sub(atomic_t i, atomic_t *v)
{
unsigned long flags;

save_flags(flags); cli();
*v -= i;
restore_flags(flags);
}

static __inline__ int atomic_sub_and_test(atomic_t i, atomic_t *v)
{
unsigned long flags, result;

save_flags(flags); cli();
*v -= i;
result = (*v == 0);
restore_flags(flags);
return result;
}

static __inline__ void atomic_inc(atomic_t *v)
{
atomic_add(1, v); } static __inline__ void atomic_dec(atomic_t *v) { atomic_sub(1, v); } static __inline__ int atomic_dec_and_test(atomic_t *v) { return atomic_sub_and_test(1, v); } #endif /* _ASM_OR32_ATOMIC_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/bitops.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/bitops.h?rev=1.1&content-type=text/x-cvsweb-markup Index: bitops.h =================================================================== #ifndef _ASM_GENERIC_BITOPS_H #define _ASM_GENERIC_BITOPS_H #ifdef __KERNEL__ #include <asm/system.h> #endif /* * For the benefit of those who are trying to port Linux to another * architecture, here are some C-language equivalents. You should * recode these in the native assembly language, if at all possible. * To guarantee atomicity, these routines call cli() and sti() to * disable interrupts while they operate. (You have to provide inline * routines to cli() and sti().) * * Also note, these routines assume that you have 32 bit integers. * You will have to change this if you are trying to port Linux to the * Alpha architecture or to a Cray. :-) * * C language equivalents written by Theodore Ts'o, 9/26/92 */ extern __inline__ int set_bit(int nr, void * a) { int * addr = a; int mask, retval; unsigned long flags; addr += nr >> 5; mask = 1 << (nr & 0x1f); save_flags(flags); cli(); retval = (mask & *addr) != 0; *addr |= mask; restore_flags(flags); return retval; } extern __inline__ int clear_bit(int nr, void * a) { int * addr = a; int mask, retval; unsigned long flags; addr += nr >> 5; mask = 1 << (nr & 0x1f); save_flags(flags); cli(); retval = (mask & *addr) != 0; *addr &= ~mask; restore_flags(flags); return retval; } extern __inline__ unsigned long change_bit(unsigned long nr, void *addr) { int mask, flags; unsigned long *ADDR = (unsigned long *) addr; unsigned long oldbit; ADDR += nr >> 5; mask = 1 << (nr & 31); save_flags(flags); cli(); oldbit = (mask & *ADDR); *ADDR ^= mask; restore_flags(flags); return oldbit != 0; } extern __inline__ int test_bit(int nr, void * a) { int * addr = a; int mask; addr += nr >> 5; mask = 1 << (nr & 0x1f); return ((mask & *addr) != 0); } /* The easy/cheese version for now. */ extern __inline__ unsigned long ffz(unsigned long word) { unsigned long result = 0; while(word & 1) { result++; word >>= 1; } return result; } /* find_next_zero_bit() finds the first zero bit in a bit string of length * 'size' bits, starting the search at bit 'offset'. This is largely based * on Linus's ALPHA routines, which are pretty portable BTW. */ extern __inline__ unsigned long find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; unsigned long tmp; if (offset >= size) return size; size -= result; offset &= 31UL; if (offset) { tmp = *(p++); tmp |= ~0UL >> (32-offset); if (size < 32) goto found_first; if (~tmp) goto found_middle; size -= 32; result += 32; } while (size & ~31UL) { if (~(tmp = *(p++))) goto found_middle; result += 32; size -= 32; } if (!size) return result; tmp = *p; found_first: tmp |= ~0UL >> size; found_middle: return result + ffz(tmp); } /* Linus sez that gcc can optimize the following correctly, we'll see if this * holds on the Sparc as it does for the ALPHA. */ #define find_first_zero_bit(addr, size) \ find_next_zero_bit((addr), (size), 0) /* Now for the ext2 filesystem bit operations and helper routines. */ extern __inline__ int ext2_set_bit(int nr,void * addr) { int mask, retval, flags; unsigned char *ADDR = (unsigned char *) addr; ADDR += nr >> 3; mask = 1 << (nr & 0x07); save_flags(flags); cli(); retval = (mask & *ADDR) != 0; *ADDR |= mask; restore_flags(flags); return retval; } extern __inline__ int ext2_clear_bit(int nr, void * addr) { int mask, retval, flags; unsigned char *ADDR = (unsigned char *) addr; ADDR += nr >> 3; mask = 1 << (nr & 0x07); save_flags(flags); cli(); retval = (mask & *ADDR) != 0; *ADDR &= ~mask; restore_flags(flags); return retval; } extern __inline__ int ext2_test_bit(int nr, const void * addr) { int mask; const unsigned char *ADDR = (const unsigned char *) addr; ADDR += nr >> 3; mask = 1 << (nr & 0x07); return ((mask & *ADDR) != 0); } #define ext2_find_first_zero_bit(addr, size) \ ext2_find_next_zero_bit((addr), (size), 0) extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; unsigned long tmp; if (offset >= size) return size; size -= result; offset &= 31UL; if(offset) { tmp = *(p++); tmp |= ~0UL << (32-offset); if(size < 32) goto found_first; if(~tmp) goto found_middle; size -= 32; result += 32; } while(size & ~31UL) { if(~(tmp = *(p++))) goto found_middle; result += 32; size -= 32; } if(!size) return result; tmp = *p; found_first: tmp |= ~0UL << size; found_middle: tmp = ((tmp>>24) | ((tmp>>8)&0xff00) | ((tmp<<8)&0xff0000) | (tmp<<24)); return result + ffz(tmp); } #define __ext2_set_bit ext2_set_bit #define __ext2_clear_bit ext2_clear_bit extern __inline__ int __ext2_test_bit(int nr, __const__ void * addr) { int mask; __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; ADDR += nr >> 3; mask = 1 << (nr & 0x07); return ((mask & *ADDR) != 0); } extern __inline__ unsigned short __swab16(unsigned short value) { return ((value >> 8) | (value << 8)); } extern __inline__ unsigned long __swab32(unsigned long value) { return ((value >> 24) | ((value >> 8) & 0xff00) | ((value << 8) & 0xff0000) | (value << 24)); } #define __ext2_find_first_zero_bit(addr, size) \ __ext2_find_next_zero_bit((addr), (size), 0) extern __inline__ unsigned long __ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; unsigned long tmp; if (offset >= size) return size; size -= result; offset &= 31UL; if(offset) { tmp = *(p++); tmp |= __swab32(~0UL >> (32-offset)); if(size < 32) goto found_first; if(~tmp) goto found_middle; size -= 32; result += 32; } while(size & ~31UL) { if(~(tmp = *(p++))) goto found_middle; result += 32; size -= 32; } if(!size) return result; tmp = *p; found_first: return result + ffz(__swab32(tmp) | (~0UL << size)); found_middle: return result + ffz(__swab32(tmp)); } #endif /* _ASM_GENERIC_BITOPS_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/board.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/board.h?rev=1.1&content-type=text/x-cvsweb-markup Index: board.h =================================================================== #ifndef _ASM_OR32_BOARH_H #define _ASM_OR32_BOARH_H /* System clock frequecy */ #define SYS_CLK 25000000 /* Memory organization */ #define SRAM_BASE_ADD 0x00000000 #define FLASH_BASE_ADD 0xf0000000 /* Devices base address */ #define UART_BASE_ADD 0x90000000 #define MC_BASE_ADD 0x93000000 #define CRT_BASE_ADD 0x97000000 #define FBMEM_BASE_ADD 0xa8000000 #define ETH_BASE_ADD 0x92000000 #define KBD_BASE_ADD 0x94000000 /* Define this if you want to use I and/or D cache */ #define ICACHE 0 #define DCACHE 0 #define IC_SIZE 8192 #define IC_LINE 16 #define DC_SIZE 8192 #define DC_LINE 16 /* Define this if you want to use I and/or D MMU */ #define IMMU 0 #define DMMU 0 #define DMMU_SET_NB 64 #define DMMU_PAGE_ADD_BITS 13 /* 13 for 8k, 12 for 4k page size */ #define DMMU_PAGE_ADD_MASK 0x3fff /* 0x3fff for 8k, 0x1fff for 4k page size */ #define DMMU_SET_ADD_MASK 0x3f /* 0x3f for, 64 0x7f for 128 nuber of sets */ #define IMMU_SET_NB 64 #define IMMU_PAGE_ADD_BITS 13 /* 13 for 8k, 12 for 4k page size */ #define IMMU_PAGE_ADD_MASK 0x3fff /* 0x3fff for 8k, 0x1fff for 4k page size */ #define IMMU_SET_ADD_MASK 0x3f /* 0x3f for, 64 0x7f for 128 nuber of sets */ /* Uart definitions */ #define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ #define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */ /* You have to set console baud rate manually in drivers/char/console.c line 350 (function rs_init()) */ #define OR32_CONSOLE_BAUD 115200 #define UART_DEVISOR SYS_CLK/(16*OR32_CONSOLE_BAUD) #define CONFIG_OETH_UNKNOWN_TX_NEXT 1 /* Define this if you are using MC */ #define MC_INIT 0 /* Memory controller initialize values */ #if 0 // 25MHz #define MC_CSR_VAL 0x0B000300 #define MC_MASK_VAL 0x000003f0 #define FLASH_TMS_VAL 0x00000103 #define SDRAM_BASE_ADD 0x00000000 #define SDRAM_TMS_VAL 0x19220057 #else // 100MHz #define MC_CSR_VAL 0x0B000300 #define MC_MASK_VAL 0x000003f0 #define FLASH_TMS_VAL 0x0000010c #define SDRAM_BASE_ADD 0x00000000 #define SDRAM_TMS_VAL 0x2a5a0300 #endif /* Define ethernet MAC address */ #define MACADDR0 0x00 #define MACADDR1 0x01 #define MACADDR2 0x02 #define MACADDR3 0x03 #define MACADDR4 0x04 #define MACADDR5 0x05 #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/bootinfo.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/bootinfo.h?rev=1.1&content-type=text/x-cvsweb-markup Index: bootinfo.h =================================================================== #ifndef _ASM_OR32_BOOTINFO_H #define _ASM_OR32_BOOTINFO_H /* Nothing for or32 */ #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/bugs.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/bugs.h?rev=1.1&content-type=text/x-cvsweb-markup Index: bugs.h =================================================================== /* * This is included by init/main.c to check for architecture-dependent bugs. * * Needs: * void check_bugs(void); */ static void check_bugs(void) { } 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/byteorder.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/byteorder.h?rev=1.1&content-type=text/x-cvsweb-markup Index: byteorder.h =================================================================== #ifndef _OR32_BYTEORDER_H #define _OR32_BYTEORDER_H #ifndef __BIG_ENDIAN #define __BIG_ENDIAN 4321 #endif #ifndef __BIG_ENDIAN_BITFIELD #define __BIG_ENDIAN_BITFIELD #endif #undef ntohl #undef ntohs #undef htonl #undef htons extern unsigned long int ntohl(unsigned long int); extern unsigned short int ntohs(unsigned short int); extern unsigned long int htonl(unsigned long int); extern unsigned short int htons(unsigned short int); extern __inline__ unsigned long int __ntohl(unsigned long int); extern __inline__ unsigned short int __ntohs(unsigned short int); extern __inline__ unsigned long int __ntohl(unsigned long int x) { return x; } extern __inline__ unsigned short int __ntohs(unsigned short int x) { return x; } #define __htonl(x) __ntohl(x) #define __htons(x) __ntohs(x) #define ntohl(x) __ntohl(x) #define ntohs(x) __ntohs(x) #define htonl(x) __htonl(x) #define htons(x) __htons(x) #define le16_to_cpu(x) \ ((__u16)((((__u16)(x) & 0x00FFU) << 8) | \ (((__u16)(x) & 0xFF00U) >> 8))) #define le32_to_cpu(x) \ ((__u32)((((__u32)(x) & 0x000000FFU) << 24) | \ (((__u32)(x) & 0x0000FF00U) << 8) | \ (((__u32)(x) & 0x00FF0000U) >> 8) | \ (((__u32)(x) & 0xFF000000U) >> 24))) #define le64_to_cpu(x) \ ((__u64)((((__u64)(x) & 0x00000000000000FFULL) << 56) | \ (((__u64)(x) & 0x000000000000FF00ULL) << 40) | \ (((__u64)(x) & 0x0000000000FF0000ULL) << 24) | \ (((__u64)(x) & 0x00000000FF000000ULL) << 8) | \ (((__u64)(x) & 0x000000FF00000000ULL) >> 8) | \ (((__u64)(x) & 0x0000FF0000000000ULL) >> 24) | \ (((__u64)(x) & 0x00FF000000000000ULL) >> 40) | \ (((__u64)(x) & 0xFF00000000000000ULL) >> 56))) #define cpu_to_le16(x) (le16_to_cpu(x)) #define cpu_to_le32(x) (le32_to_cpu(x)) #define cpu_to_le64(x) (le64_to_cpu(x)) #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/checksum.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/checksum.h?rev=1.1&content-type=text/x-cvsweb-markup Index: checksum.h =================================================================== #ifndef _OR32_CHECKSUM_H #define _OR32_CHECKSUM_H #include <linux/config.h> /* * computes the checksum of a memory block at buff, length len, * and adds in "sum" (32-bit) * * returns a 32-bit number suitable for feeding into itself * or csum_tcpudp_magic * * this function must be called with even lengths, except * for the last fragment, which may be odd * * it's best to have buff aligned on a 32-bit boundary */ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); /* * the same as csum_partial_copy, but copies from src while it * checksums * * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum); /* * the same as csum_partial_copy, but copies from user space. * * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ unsigned int csum_partial_copy_fromuser(const char *src, char *dst, int len, int sum); unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl); /* * Fold a partial checksum without adding pseudo headers */ static inline unsigned short csum_fold(unsigned int sum) { sum = (sum & 0xffff) + (sum >> 16); sum = (sum & 0xffff) + (sum >> 16); return ~sum; } /* * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, unsigned short proto, unsigned int sum) { unsigned long result = saddr; result += daddr; result += (daddr > result); result += len; result += (len > result); result += proto; result += (proto > result); result += sum; result += (sum > result); result = (result >> 16) + (result & 0xffff); result = (result >> 16) + (result & 0xffff); return ~result; } extern unsigned short ip_compute_csum(const unsigned char * buff, int len); #endif /* _OR32_CHECKSUM_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/delay.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/delay.h?rev=1.1&content-type=text/x-cvsweb-markup Index: delay.h =================================================================== #ifndef _OR32_DELAY_H #define _OR32_DELAY_H extern unsigned long loops_per_sec; #include <linux/kernel.h> #include <linux/config.h> extern __inline__ void __delay(unsigned long loops) { __asm__ __volatile__ ("1: l.sfeqi %0,0; \ l.bnf 1b; \ l.addi %0,%0,-1;" : "=r" (loops) : "0" (loops)); } extern __inline__ void udelay(unsigned long usecs) { /* Sigh */ __delay(usecs); } #define muldiv(a, b, c) (((a)*(b))/(c)) #endif /* defined(_OR32_DELAY_H) */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/dma.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/dma.h?rev=1.1&content-type=text/x-cvsweb-markup Index: dma.h =================================================================== #ifndef _OR32_DMA_H #define _OR32_DMA_H 1 #include <linux/config.h> #define MAX_DMA_CHANNELS 8 /* These are in kernel/dma.c: */ extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */ extern void free_dma(unsigned int dmanr); /* release it again */ #endif /* _OR32_DMA_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/elf.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/elf.h?rev=1.1&content-type=text/x-cvsweb-markup Index: elf.h =================================================================== #ifndef _ASM_OR32_ELF_H #define _ASM_OR32_ELF_H /* * ELF register definitions.. */ #include <asm/ptrace.h> typedef unsigned long elf_greg_t; #define ELF_NGREG 33 /* pc/sr/sp/r2-r31 */ typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef struct user_or32fp_struct elf_fpregset_t; /* Define the ELF target machines */ #define EM_OR32 80 /* OpenRISC 1000 */ /* * This is used to ensure we don't load something for the wrong architecture. */ #define elf_check_arch(x) ((x) == EM_OR32) /* Max number of setion in one elf file */ #define ELF_SECTION_NB 20 /* * These are used to set parameters in the core dumps. */ #define ELF_CLASS ELFCLASS32 #define ELF_DATA ELFDATA2MSB; #define ELF_ARCH EM_OR32 #undef USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE 4096 enum reloc_type { R_OR32_NONE = 0, R_OR32_32, R_OR32_16, R_OR32_8, R_OR32_CONST, R_OR32_CONSTH, R_OR32_JUMPTARG, R_OR32_max }; #define ELF_CORE_COPY_REGS(pr_reg, regs) \ /* Bleech. */ \ pr_reg[0] = regs->pc; \ pr_reg[1] = regs->sr; \ pr_reg[2] = regs->sp; \ pr_reg[3] = regs->gprs[0]; \ pr_reg[4] = regs->gprs[1]; \ pr_reg[5] = regs->gprs[2]; \ pr_reg[6] = regs->gprs[3]; \ pr_reg[7] = regs->gprs[4]; \ pr_reg[8] = regs->gprs[5]; \ pr_reg[9] = regs->gprs[6]; \ pr_reg[10] = regs->gprs[7]; \ pr_reg[11] = regs->gprs[8]; \ pr_reg[12] = regs->gprs[9]; \ pr_reg[13] = regs->gprs[10]; \ pr_reg[14] = regs->gprs[11]; \ pr_reg[15] = regs->gprs[12]; \ pr_reg[16] = regs->gprs[13]; \ pr_reg[17] = regs->gprs[14]; \ pr_reg[18] = regs->gprs[15]; \ pr_reg[19] = regs->gprs[16]; \ pr_reg[20] = regs->gprs[17]; \ pr_reg[21] = regs->gprs[18]; \ pr_reg[22] = regs->gprs[19]; \ pr_reg[23] = regs->gprs[20]; \ pr_reg[24] = regs->gprs[21]; \ pr_reg[25] = regs->gprs[22]; \ pr_reg[26] = regs->gprs[23]; \ pr_reg[27] = regs->gprs[24]; \ pr_reg[28] = regs->gprs[25]; \ pr_reg[29] = regs->gprs[26]; \ pr_reg[30] = regs->gprs[27]; \ pr_reg[31] = regs->gprs[28]; \ pr_reg[32] = regs->gprs[29]; \ } #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/errno.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/errno.h?rev=1.1&content-type=text/x-cvsweb-markup Index: errno.h =================================================================== #ifndef _OR32_ERRNO_H #define _OR32_ERRNO_H #define EPERM 1 /* Operation not permitted */ #define ENOENT 2 /* No such file or directory */ #define ESRCH 3 /* No such process */ #define EINTR 4 /* Interrupted system call */ #define EIO 5 /* I/O error */ #define ENXIO 6 /* No such device or address */ #define E2BIG 7 /* Arg list too long */ #define ENOEXEC 8 /* Exec format error */ #define EBADF 9 /* Bad file number */ #define ECHILD 10 /* No child processes */ #define EAGAIN 11 /* Try again */ #define ENOMEM 12 /* Out of memory */ #define EACCES 13 /* Permission denied */ #define EFAULT 14 /* Bad address */ #define ENOTBLK 15 /* Block device required */ #define EBUSY 16 /* Device or resource busy */ #define EEXIST 17 /* File exists */ #define EXDEV 18 /* Cross-device link */ #define ENODEV 19 /* No such device */ #define ENOTDIR 20 /* Not a directory */ #define EISDIR 21 /* Is a directory */ #define EINVAL 22 /* Invalid argument */ #define ENFILE 23 /* File table overflow */ #define EMFILE 24 /* Too many open files */ #define ENOTTY 25 /* Not a typewriter */ #define ETXTBSY 26 /* Text file busy */ #define EFBIG 27 /* File too large */ #define ENOSPC 28 /* No space left on device */ #define ESPIPE 29 /* Illegal seek */ #define EROFS 30 /* Read-only file system */ #define EMLINK 31 /* Too many links */ #define EPIPE 32 /* Broken pipe */ #define EDOM 33 /* Math argument out of domain of func */ #define ERANGE 34 /* Math result not representable */ #define EDEADLK 35 /* Resource deadlock would occur */ #define ENAMETOOLONG 36 /* File name too long */ #define ENOLCK 37 /* No record locks available */ #define ENOSYS 38 /* Function not implemented */ #define ENOTEMPTY 39 /* Directory not empty */ #define ELOOP 40 /* Too many symbolic links encountered */ #define EWOULDBLOCK EAGAIN /* Operation would block */ #define ENOMSG 42 /* No message of desired type */ #define EIDRM 43 /* Identifier removed */ #define ECHRNG 44 /* Channel number out of range */ #define EL2NSYNC 45 /* Level 2 not synchronized */ #define EL3HLT 46 /* Level 3 halted */ #define EL3RST 47 /* Level 3 reset */ #define ELNRNG 48 /* Link number out of range */ #define EUNATCH 49 /* Protocol driver not attached */ #define ENOCSI 50 /* No CSI structure available */ #define EL2HLT 51 /* Level 2 halted */ #define EBADE 52 /* Invalid exchange */ #define EBADR 53 /* Invalid request descriptor */ #define EXFULL 54 /* Exchange full */ #define ENOANO 55 /* No anode */ #define EBADRQC 56 /* Invalid request code */ #define EBADSLT 57 /* Invalid slot */ #define EDEADLOCK EDEADLK #define EBFONT 59 /* Bad font file format */ #define ENOSTR 60 /* Device not a stream */ #define ENODATA 61 /* No data available */ #define ETIME 62 /* Timer expired */ #define ENOSR 63 /* Out of streams resources */ #define ENONET 64 /* Machine is not on the network */ #define ENOPKG 65 /* Package not installed */ #define EREMOTE 66 /* Object is remote */ #define ENOLINK 67 /* Link has been severed */ #define EADV 68 /* Advertise error */ #define ESRMNT 69 /* Srmount error */ #define ECOMM 70 /* Communication error on send */ #define EPROTO 71 /* Protocol error */ #define EMULTIHOP 72 /* Multihop attempted */ #define EDOTDOT 73 /* RFS specific error */ #define EBADMSG 74 /* Not a data message */ #define EOVERFLOW 75 /* Value too large for defined data type */ #define ENOTUNIQ 76 /* Name not unique on network */ #define EBADFD 77 /* File descriptor in bad state */ #define EREMCHG 78 /* Remote address changed */ #define ELIBACC 79 /* Can not access a needed shared library */ #define ELIBBAD 80 /* Accessing a corrupted shared library */ #define ELIBSCN 81 /* .lib section in a.out corrupted */ #define ELIBMAX 82 /* Attempting to link in too many shared libraries */ #define ELIBEXEC 83 /* Cannot exec a shared library directly */ #define EILSEQ 84 /* Illegal byte sequence */ #define ERESTART 85 /* Interrupted system call should be restarted */ #define ESTRPIPE 86 /* Streams pipe error */ #define EUSERS 87 /* Too many users */ #define ENOTSOCK 88 /* Socket operation on non-socket */ #define EDESTADDRREQ 89 /* Destination address required */ #define EMSGSIZE 90 /* Message too long */ #define EPROTOTYPE 91 /* Protocol wrong type for socket */ #define ENOPROTOOPT 92 /* Protocol not available */ #define EPROTONOSUPPORT 93 /* Protocol not supported */ #define ESOCKTNOSUPPORT 94 /* Socket type not supported */ #define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ #define EPFNOSUPPORT 96 /* Protocol family not supported */ #define EAFNOSUPPORT 97 /* Address family not supported by protocol */ #define EADDRINUSE 98 /* Address already in use */ #define EADDRNOTAVAIL 99 /* Cannot assign requested address */ #define ENETDOWN 100 /* Network is down */ #define ENETUNREACH 101 /* Network is unreachable */ #define ENETRESET 102 /* Network dropped connection because of reset */ #define ECONNABORTED 103 /* Software caused connection abort */ #define ECONNRESET 104 /* Connection reset by peer */ #define ENOBUFS 105 /* No buffer space available */ #define EISCONN 106 /* Transport endpoint is already connected */ #define ENOTCONN 107 /* Transport endpoint is not connected */ #define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ #define ETOOMANYREFS 109 /* Too many references: cannot splice */ #define ETIMEDOUT 110 /* Connection timed out */ #define ECONNREFUSED 111 /* Connection refused */ #define EHOSTDOWN 112 /* Host is down */ #define EHOSTUNREACH 113 /* No route to host */ #define EALREADY 114 /* Operation already in progress */ #define EINPROGRESS 115 /* Operation now in progress */ #define ESTALE 116 /* Stale NFS file handle */ #define EUCLEAN 117 /* Structure needs cleaning */ #define ENOTNAM 118 /* Not a XENIX named type file */ #define ENAVAIL 119 /* No XENIX semaphores available */ #define EISNAM 120 /* Is a named type file */ #define EREMOTEIO 121 /* Remote I/O error */ #define EDQUOT 122 /* Quota exceeded */ #define ENOMEDIUM 123 /* No medium found */ #define EMEDIUMTYPE 124 /* Wrong medium type */ #define ETOOMANYSECT 125 /* To many sections in elf file */ #define ENOMAIN 126 /* To many sections in elf file */ #endif /* _OR32_ERRNO_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/fcntl.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/fcntl.h?rev=1.1&content-type=text/x-cvsweb-markup Index: fcntl.h =================================================================== #ifndef _OR32_FCNTL_H #define _OR32_FCNTL_H /* open/fcntl - O_SYNC is only implemented on blocks devices and on files located on an ext2 file system */ #define O_ACCMODE 0003 #define O_RDONLY 00 #define O_WRONLY 01 #define O_RDWR 02 #define O_CREAT 0100 /* not fcntl */ #define O_EXCL 0200 /* not fcntl */ #define O_NOCTTY 0400 /* not fcntl */ #define O_TRUNC 01000 /* not fcntl */ #define O_APPEND 02000 #define O_NONBLOCK 04000 #define O_NDELAY O_NONBLOCK #define O_SYNC 010000 #define FASYNC 020000 /* fcntl, for BSD compatibility */ #define F_DUPFD 0 /* dup */ #define F_GETFD 1 /* get f_flags */ #define F_SETFD 2 /* set f_flags */ #define F_GETFL 3 /* more flags (cloexec) */ #define F_SETFL 4 #define F_GETLK 5 #define F_SETLK 6 #define F_SETLKW 7 #define F_SETOWN 8 /* for sockets. */ #define F_GETOWN 9 /* for sockets. */ /* for F_[GET|SET]FL */ #define FD_CLOEXEC 1 /* actually anything with low bit set goes */ /* for posix fcntl() and lockf() */ #define F_RDLCK 0 #define F_WRLCK 1 #define F_UNLCK 2 /* for old implementation of bsd flock () */ #define F_EXLCK 4 /* or 3 */ #define F_SHLCK 8 /* or 4 */ /* operations for bsd flock(), also used by the kernel implementation */ #define LOCK_SH 1 /* shared lock */ #define LOCK_EX 2 /* exclusive lock */ #define LOCK_NB 4 /* or'd with one of the above to prevent blocking */ #define LOCK_UN 8 /* remove lock */ struct flock { short l_type; short l_whence; off_t l_start; off_t l_len; pid_t l_pid; }; #endif /* _OR32_FCNTL_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/flat.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/flat.h?rev=1.1&content-type=text/x-cvsweb-markup Index: flat.h =================================================================== /* Copyright (C) 1998 Kenneth Albanowski <kjahds@k...> * The Silver Hammer Group, Ltd. * */ #ifndef _LINUX_FLAT_H #define _LINUX_FLAT_H struct flat_hdr { char magic[4]; unsigned long rev; unsigned long entry; /* Offset of first executable instruction with text segment from beginning of file*/ unsigned long data_start; /* Offset of data segment from beginning of file*/ unsigned long data_end; /* Offset of end of data segment from beginning of file*/ unsigned long bss_end; /* Offset of end of bss segment from beginning of file*/ /* (It is assumed that data_end through bss_end forms the bss segment.) */ unsigned long stack_size; /* Size of stack, in bytes */ unsigned long reloc_start; /* Offset of relocation records from beginning of file */ unsigned long reloc_count; /* Number of relocation records */ unsigned long flags; unsigned long filler[6]; /* Reservered, set to zero */ }; #define FLAT_RELOC_TYPE_TEXT 0 #define FLAT_RELOC_TYPE_DATA 1 #define FLAT_RELOC_TYPE_BSS 2 struct flat_reloc { #ifdef CONFIG_COLDFIRE unsigned long type : 2; signed long offset : 30; #else signed long offset : 30; unsigned long type : 2; #endif }; #define FLAT_FLAG_RAM 0x0001 /* program should be loaded entirely into RAM */ #endif /* _LINUX_FLAT_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/font.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/font.h?rev=1.1&content-type=text/x-cvsweb-markup Index: font.h =================================================================== /* * asm-or32/font.h -- `Soft' font definitions * * Created 1995 by Geert Uytterhoeven * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ #ifndef _ASM_OR32_FONT_H #define _ASM_OR32_FONT_H #include <linux/types.h> /* * Find a font with a specific name */ extern int findsoftfont(char *name, int *width, int *height, u_char *data[]); /* * Get the default font for a specific screen size */ extern void getdefaultfont(int xres, int yres, char *name[], int *width, int *height, u_char *data[]); /* Max. length for the name of a predefined font */ #define MAX_FONT_NAME 32 #endif /* _ASM_OR32_FONT_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/io.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/io.h?rev=1.1&content-type=text/x-cvsweb-markup Index: io.h =================================================================== #ifndef _OR32_IO_H #define _OR32_IO_H /* * readX/writeX() are used to access memory mapped devices. On some * architectures the memory mapped IO stuff needs to be accessed * differently. On the m68k architecture, we just read/write the * memory location directly. */ /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates * two accesses to memory, which may be undesireable for some devices. */ #define readb(addr) \ ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; }) #define readw(addr) \ ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; }) #define readl(addr) \ ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; }) #define writeb(b,addr) ((*(volatile unsigned char *) (addr)) = (b)) #define writew(b,addr) ((*(volatile unsigned short *) (addr)) = (b)) #define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) /* There is no difference between I/O and memory on 68k, these are the same */ #define inb(addr) \ ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; }) #define inw(addr) \ ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; }) #define inl(addr) \ ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; }) #define outb(b,addr) ((*(volatile unsigned char *) (addr)) = (b)) #define outw(b,addr) ((*(volatile unsigned short *) (addr)) = (b)) #define outl(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) #define inb_p inb #define inw_p inw #define outb_p outb #define outw_p outw #define REG8(addr) (*(volatile unsigned char *) (addr)) #define REG16(addr) (*(volatile unsigned short *) (addr)) #define REG32(addr) (*(volatile unsigned int *) (addr)) static inline void outsb(void *addr, void *buf, int len) { volatile unsigned char *ap = (volatile unsigned char *) addr; unsigned char *bp = (unsigned char *) buf; while (len--) *ap = *bp++; } static inline void outsw(void *addr, void *buf, int len) { volatile unsigned short *ap = (volatile unsigned short *) addr; unsigned short *bp = (unsigned short *) buf; while (len--) *ap = *bp++; } static inline void outsl(void *addr, void *buf, int len) { volatile unsigned int *ap = (volatile unsigned int *) addr; unsigned int *bp = (unsigned int *) buf; while (len--) *ap = *bp++; } static inline void insb(void *addr, void *buf, int len) { volatile unsigned char *ap = (volatile unsigned char *) addr; unsigned char *bp = (unsigned char *) buf; while (len--) *bp++ = *ap; } static inline void insw(void *addr, void *buf, int len) { volatile unsigned short *ap = (volatile unsigned short *) addr; unsigned short *bp = (unsigned short *) buf; while (len--) *bp++ = *ap; } static inline void insl(void *addr, void *buf, int len) { volatile unsigned int *ap = (volatile unsigned int *) addr; unsigned int *bp = (unsigned int *) buf; while (len--) *bp++ = *ap; } /* * Change virtual addresses to physical addresses and vv. * These are trivial on the 1:1 Linux/i386 mapping (but if we ever * make the kernel segment mapped at 0, we need to do translation * on the i386 as well) */ extern unsigned long mm_vtop(unsigned long addr); extern unsigned long mm_ptov(unsigned long addr); extern inline unsigned long virt_to_phys(volatile void * address) { return (unsigned long) mm_vtop((unsigned long)address); } extern inline void * phys_to_virt(unsigned long address) { return (void *) mm_ptov(address); } /* * IO bus memory addresses are also 1:1 with the physical address */ #define virt_to_bus virt_to_phys #define bus_to_virt phys_to_virt #endif /* _OR32_IO_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/ioctl.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/ioctl.h?rev=1.1&content-type=text/x-cvsweb-markup Index: ioctl.h =================================================================== /* $Id: ioctl.h,v 1.1 2005/12/20 11:35:46 jcastillo Exp $ * * linux/ioctl.h for Linux by H.H. Bergman. */ #ifndef _OR32_IOCTL_H #define _OR32_IOCTL_H /* ioctl command encoding: 32 bits total, command in lower 16 bits, * size of the parameter structure in the lower 14 bits of the * upper 16 bits. * Encoding the size of the parameter structure in the ioctl request * is useful for catching programs compiled with old versions * and to avoid overwriting user space outside the user buffer area. * The highest 2 bits are reserved for indicating the ``access mode''. * NOTE: This limits the max parameter size to 16kB -1 ! */ /* * I don't really have any idea about what this should look like, so * for the time being, this is heavily based on the PC definitions. */ /* * The following is for compatibility across the various Linux * platforms. The i386 ioctl numbering scheme doesn't really enforce * a type field. De facto, however, the top 8 bits of the lower 16 * bits are indeed used as a type field, so we might just as well make * this explicit here. Please be sure to use the decoding macros * below from now on. */ #define _IOC_NRBITS 8 #define _IOC_TYPEBITS 8 #define _IOC_SIZEBITS 14 #define _IOC_DIRBITS 2 #define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) #define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) #define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) #define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) #define _IOC_NRSHIFT 0 #define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS) #define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS) #define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS) /* * Direction bits. */ #define _IOC_NONE 0U #define _IOC_WRITE 1U #define _IOC_READ 2U #define _IOC(dir,type,nr,size) \ (((dir) << _IOC_DIRSHIFT) | \ ((type) << _IOC_TYPESHIFT) | \ ((nr) << _IOC_NRSHIFT) | \ ((size) << _IOC_SIZESHIFT)) /* used to create numbers */ #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) /* used to decode ioctl numbers.. */ #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) #define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) #define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) /* ...and for the drivers/sound files... */ #define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT) #define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT) #define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT) #define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT) #define IOCSIZE_SHIFT (_IOC_SIZESHIFT) #endif /* _OR32_IOCTL_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/ioctls.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/ioctls.h?rev=1.1&content-type=text/x-cvsweb-markup Index: ioctls.h =================================================================== #ifndef _ASM_OR32_IOCTLS_H #define _ASM_OR32_IOCTLS_H #include <asm/ioctl.h> /* 0x54 is just a magic number to make these relatively unique ('T') */ #define TCGETS 0x5401 #define TCSETS 0x5402 #define TCSETSW 0x5403 #define TCSETSF 0x5404 #define TCGETA 0x5405 #define TCSETA 0x5406 #define TCSETAW 0x5407 #define TCSETAF 0x5408 #define TCSBRK 0x5409 #define TCXONC 0x540A #define TCFLSH 0x540B #define TIOCEXCL 0x540C #define TIOCNXCL 0x540D #define TIOCSCTTY 0x540E #define TIOCGPGRP 0x540F #define TIOCSPGRP 0x5410 #define TIOCOUTQ 0x5411 #define TIOCSTI 0x5412 #define TIOCGWINSZ 0x5413 #define TIOCSWINSZ 0x5414 #define TIOCMGET 0x5415 #define TIOCMBIS 0x5416 #define TIOCMBIC 0x5417 #define TIOCMSET 0x5418 #define TIOCGSOFTCAR 0x5419 #define TIOCSSOFTCAR 0x541A #define FIONREAD 0x541B #define TIOCINQ FIONREAD #define TIOCLINUX 0x541C #define TIOCCONS 0x541D #define TIOCGSERIAL 0x541E #define TIOCSSERIAL 0x541F #define TIOCPKT 0x5420 #define FIONBIO 0x5421 #define TIOCNOTTY 0x5422 #define TIOCSETD 0x5423 #define TIOCGETD 0x5424 #define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ #define TIOCTTYGSTRUCT 0x5426 /* For debugging only */ #define TIOCSBRK 0x5427 /* BSD compatibility */ #define TIOCCBRK 0x5428 /* BSD compatibility */ #define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ #define FIOCLEX 0x5451 #define FIOASYNC 0x5452 #define TIOCSERCONFIG 0x5453 #define TIOCSERGWILD 0x5454 #define TIOCSERSWILD 0x5455 #define TIOCGLCKTRMIOS 0x5456 #define TIOCSLCKTRMIOS 0x5457 #define TIOCSERGSTRUCT 0x5458 /* For debugging only */ #define TIOCSERGETLSR 0x5459 /* Get line status register */ #define TIOCSERGETMULTI 0x545A /* Get multiport config */ #define TIOCSERSETMULTI 0x545B /* Set multiport config */ #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ /* Used for packet mode */ #define TIOCPKT_DATA 0 #define TIOCPKT_FLUSHREAD 1 #define TIOCPKT_FLUSHWRITE 2 #define TIOCPKT_STOP 4 #define TIOCPKT_START 8 #define TIOCPKT_NOSTOP 16 #define TIOCPKT_DOSTOP 32 #define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ #endif /* _ASM_OR32_IOCTLS_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/irq.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/irq.h?rev=1.1&content-type=text/x-cvsweb-markup Index: irq.h =================================================================== #ifndef _OR32_IRQ_H_ #define _OR32_IRQ_H_ extern void disable_irq(unsigned int); extern void enable_irq(unsigned int); #include <linux/config.h> #define SYS_IRQS 32 #define NR_IRQS SYS_IRQS /* * "Generic" interrupt sources */ #define IRQ_UART_0 (2) /* interrupt source for UART dvice 0 */ #define IRQ_ETH_0 (4) /* interrupt source for Ethernet dvice 0 */ #define IRQ_PS2_0 (5) /* interrupt source for ps2 dvice 0 */ #define IRQ_SCHED_TIMER (0) /* interrupt source for scheduling timer */ /* * various flags for request_irq() */ #define IRQ_FLG_LOCK (0x0001) /* handler is not replaceable */ #define IRQ_FLG_REPLACE (0x0002) /* replace existing handler */ #define IRQ_FLG_PRI_HI (0x0004) #define IRQ_FLG_STD (0x8000) /* internally used */ /* * This structure has only 4 elements for speed reasons */ typedef struct irq_handler { void (*handler)(int, void *, struct pt_regs *); unsigned long flags; void *dev_id; const char *devname; } irq_handler_t; /* count of spurious interrupts */ extern volatile unsigned int num_spurious; #endif /* _OR32_IRQ_H_ */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/machdep.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/machdep.h?rev=1.1&content-type=text/x-cvsweb-markup Index: machdep.h =================================================================== #ifndef _OR32_MACHDEP_H #define _OR32_MACHDEP_H #define VULP(x) (*(volatile unsigned long*)(x)) #define VUSP(x) (*(volatile unsigned short*)(x)) #define VUCP(x) (*(volatile unsigned char*)(x)) struct pt_regs; struct kbd_repeat; struct mktime; struct hwclk_time; struct gendisk; struct buffer_head; extern void config_BSP(char *commandp, int size); extern void (*mach_sched_init) (void (*handler)(int, void *, struct pt_regs *)); extern void (*mach_tick)(void); /* machine dependent keyboard functions */ extern int (*mach_keyb_init) (void); extern int (*mach_kbdrate) (struct kbd_repeat *); extern void (*mach_kbd_leds) (unsigned int); /* machine dependent irq functions */ extern void (*mach_init_IRQ) (void); extern void (*(*mach_default_handler)[]) (int, void *, struct pt_regs *); extern int (*mach_request_irq) (unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id); extern int (*mach_free_irq) (unsigned int irq, void *dev_id); extern void (*mach_enable_irq) (unsigned int irq); extern void (*mach_disable_irq) (unsigned int irq); extern int (*mach_get_irq_list) (char *buf); extern int (*mach_process_int) (int irq, struct pt_regs *fp); extern void (*mach_trap_init) (void); /* machine dependent timer functions */ extern unsigned long (*mach_gettimeoffset)(void); extern void (*mach_gettod)(int *year, int *mon, int *day, int *hour, int *min, int *sec); extern int (*mach_hwclk)(int, struct hwclk_time*); extern int (*mach_set_clock_mmss)(unsigned long); extern void (*mach_mksound)( unsigned int count, unsigned int ticks ); extern void (*mach_reset)( void ); extern int (*mach_floppy_init) (void); extern unsigned long (*mach_hd_init) (unsigned long, unsigned long); extern void (*mach_hd_setup)(char *, int *); extern void (*waitbut)(void); extern struct fb_info *(*mach_fb_init)(long *); extern long mach_max_dma_address; extern void (*mach_debug_init)(void); extern void (*mach_video_setup)(char *, int *); extern void (*mach_floppy_setup)(char *, int *); extern void (*mach_floppy_eject)(void); #endif /* _OR32_MACHDEP_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/mc.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/mc.h?rev=1.1&content-type=text/x-cvsweb-markup Index: mc.h =================================================================== /* mc.h -- Simulation of Memory Controller Copyright (C) 2001 by Marko Mlinar, markom@o... This file is part of OpenRISC 1000 Architectural Simulator. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ /* Prototypes */ #ifndef _ASM_MC_H #define _ASM_MC_H #define N_CE (8) #define MC_CSR (0x00) #define MC_POC (0x04) #define MC_BA_MASK (0x08) #define MC_CSC(i) (0x10 + (i) * 8) #define MC_TMS(i) (0x14 + (i) * 8) #define MC_ADDR_SPACE (MC_CSC(N_CE)) /* POC register field definition */ #define MC_POC_EN_BW_OFFSET 0 #define MC_POC_EN_BW_WIDTH 2 #define MC_POC_EN_MEMTYPE_OFFSET 2 #define MC_POC_EN_MEMTYPE_WIDTH 2 /* CSC register field definition */ #define MC_CSC_EN_OFFSET 0 #define MC_CSC_MEMTYPE_OFFSET 1 #define MC_CSC_MEMTYPE_WIDTH 2 #define MC_CSC_BW_OFFSET 4 #define MC_CSC_BW_WIDTH 2 #define MC_CSC_MS_OFFSET 6 #define MC_CSC_MS_WIDTH 2 #define MC_CSC_WP_OFFSET 8 #define MC_CSC_BAS_OFFSET 9 #define MC_CSC_KRO_OFFSET 10 #define MC_CSC_PEN_OFFSET 11 #define MC_CSC_SEL_OFFSET 16 #define MC_CSC_SEL_WIDTH 8 #define MC_CSC_MEMTYPE_SDRAM 0 #define MC_CSC_MEMTYPE_SSRAM 1 #define MC_CSC_MEMTYPE_ASYNC 2 #define MC_CSC_MEMTYPE_SYNC 3 #define MC_CSR_VALID 0xFF000703LU #define MC_POC_VALID 0x0000000FLU #define MC_BA_MASK_VALID 0x000000FFLU #define MC_CSC_VALID 0x00FF0FFFLU #define MC_TMS_SDRAM_VALID 0x0FFF83FFLU #define MC_TMS_SSRAM_VALID 0x00000000LU #define MC_TMS_ASYNC_VALID 0x03FFFFFFLU #define MC_TMS_SYNC_VALID 0x01FFFFFFLU #define MC_TMS_VALID 0xFFFFFFFFLU /* reg test compat. */ /* TMS register field definition SDRAM */ #define MC_TMS_SDRAM_TRFC_OFFSET 24 #define MC_TMS_SDRAM_TRFC_WIDTH 4 #define MC_TMS_SDRAM_TRP_OFFSET 20 #define MC_TMS_SDRAM_TRP_WIDTH 4 #define MC_TMS_SDRAM_TRCD_OFFSET 17 #define MC_TMS_SDRAM_TRCD_WIDTH 4 #define MC_TMS_SDRAM_TWR_OFFSET 15 #define MC_TMS_SDRAM_TWR_WIDTH 2 #define MC_TMS_SDRAM_WBL_OFFSET 9 #define MC_TMS_SDRAM_OM_OFFSET 7 #define MC_TMS_SDRAM_OM_WIDTH 2 #define MC_TMS_SDRAM_CL_OFFSET 4 #define MC_TMS_SDRAM_CL_WIDTH 3 #define MC_TMS_SDRAM_BT_OFFSET 3 #define MC_TMS_SDRAM_BL_OFFSET 0 #define MC_TMS_SDRAM_BL_WIDTH 3 /* TMS register field definition ASYNC */ #define MC_TMS_ASYNC_TWWD_OFFSET 20 #define MC_TMS_ASYNC_TWWD_WIDTH 6 #define MC_TMS_ASYNC_TWD_OFFSET 16 #define MC_TMS_ASYNC_TWD_WIDTH 4 #define MC_TMS_ASYNC_TWPW_OFFSET 12 #define MC_TMS_ASYNC_TWPW_WIDTH 4 #define MC_TMS_ASYNC_TRDZ_OFFSET 8 #define MC_TMS_ASYNC_TRDZ_WIDTH 4 #define MC_TMS_ASYNC_TRDV_OFFSET 0 #define MC_TMS_ASYNC_TRDV_WIDTH 8 /* TMS register field definition SYNC */ #define MC_TMS_SYNC_TTO_OFFSET 16 #define MC_TMS_SYNC_TTO_WIDTH 9 #define MC_TMS_SYNC_TWR_OFFSET 12 #define MC_TMS_SYNC_TWR_WIDTH 4 #define MC_TMS_SYNC_TRDZ_OFFSET 8 #define MC_TMS_SYNC_TRDZ_WIDTH 4 #define MC_TMS_SYNC_TRDV_OFFSET 0 #define MC_TMS_SYNC_TRDV_WIDTH 8 #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/mman.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/mman.h?rev=1.1&content-type=text/x-cvsweb-markup Index: mman.h =================================================================== #ifndef __OR32_MMAN_H__ #define __OR32_MMAN_H__ #define PROT_READ 0x1 /* page can be read */ #define PROT_WRITE 0x2 /* page can be written */ #define PROT_EXEC 0x4 /* page can be executed */ #define PROT_NONE 0x0 /* page can not be accessed */ #define MAP_SHARED 0x01 /* Share changes */ #define MAP_PRIVATE 0x02 /* Changes are private */ #define MAP_TYPE 0x0f /* Mask for type of mapping */ #define MAP_FIXED 0x10 /* Interpret addr exactly */ #define MAP_ANONYMOUS 0x20 /* don't use a file */ #define MAP_GROWSDOWN 0x0100 /* stack-like segment */ #define MAP_DENYWRITE 0x0800 /* ETXTBSY */ #define MAP_EXECUTABLE 0x1000 /* mark it as a executable */ #define MAP_LOCKED 0x2000 /* pages are locked */ #define MS_ASYNC 1 /* sync memory asynchronously */ #define MS_INVALIDATE 2 /* invalidate the caches */ #define MS_SYNC 4 /* synchronous memory sync */ #define MCL_CURRENT 1 /* lock all current mappings */ #define MCL_FUTURE 2 /* lock all future mappings */ /* compatibility flags */ #define MAP_ANON MAP_ANONYMOUS #define MAP_FILE 0 #endif /* __OR32_MMAN_H__ */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/mmu_context.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/mmu_context.h?rev=1.1&content-type=text/x-cvsweb-markup Index: mmu_context.h =================================================================== #ifndef __OR32_MMU_CONTEXT_H #define __OR32_MMU_CONTEXT_H #include <linux/config.h> /* * get a new mmu context.. do we need this on the m68k? */ #define get_mmu_context(x) do { } while (0) #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/page.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/page.h?rev=1.1&content-type=text/x-cvsweb-markup Index: page.h =================================================================== #ifndef _OR32_PAGE_H #define _OR32_PAGE_H #include <linux/config.h> /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 #define PAGE_SIZE (1UL << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) #ifdef __KERNEL__ #define STRICT_MM_TYPECHECKS #ifdef STRICT_MM_TYPECHECKS /* * These are used to make use of C type-checking.. */ typedef struct { unsigned long pte; } pte_t; typedef struct { unsigned long pmd[16]; } pmd_t; typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pte_val(x) ((x).pte) #define pmd_val(x) ((&x)->pmd[0]) #define pgd_val(x) ((x).pgd) #define pgprot_val(x) ((x).pgprot) #define __pte(x) ((pte_t) { (x) } ) #define __pmd(x) ((pmd_t) { (x) } ) #define __pgd(x) ((pgd_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } ) #else /* * .. while these make it easier on the compiler */ typedef unsigned long pte_t; typedef struct { unsigned long pmd[16]; } pmd_t; typedef unsigned long pgd_t; typedef unsigned long pgprot_t; #define pte_val(x) (x) #define pmd_val(x) ((&x)->pmd[0]) #define pgd_val(x) (x) #define pgprot_val(x) (x) #define __pte(x) (x) #define __pmd(x) ((pmd_t) { (x) } ) #define __pgd(x) (x) #define __pgprot(x) (x) #endif /* to align the pointer to the (next) page boundary */ #define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) /* This handles the memory map.. */ #define PAGE_OFFSET 0x00000000 #define MAP_NR(addr) ((((unsigned long)(addr)) - PAGE_OFFSET) >> PAGE_SHIFT) #endif /* __KERNEL__ */ #endif /* _OR32_PAGE_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/param.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/param.h?rev=1.1&content-type=text/x-cvsweb-markup Index: param.h =================================================================== #ifndef _OR32_PARAM_H #define _OR32_PARAM_H #include <linux/config.h> #define HZ 100 #define EXEC_PAGESIZE 4096 #ifndef NGROUPS #define NGROUPS 32 #endif #ifndef NOGROUP #define NOGROUP (-1) #endif #define MAXHOSTNAMELEN 64 /* max length of hostname */ #endif /* _OR32_PARAM_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/pgtable.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/pgtable.h?rev=1.1&content-type=text/x-cvsweb-markup Index: pgtable.h =================================================================== #ifndef _OR32_PGTABLE_H #define _OR32_PGTABLE_H extern unsigned long mm_vtop(unsigned long addr) __attribute__ ((const)); extern unsigned long mm_ptov(unsigned long addr) __attribute__ ((const)); #define VTOP(addr) (mm_vtop((unsigned long)(addr))) #define PTOV(addr) (mm_ptov((unsigned long)(addr))) extern inline void flush_cache_mm(struct mm_struct *mm) { } extern inline void flush_cache_range(struct mm_struct *mm, unsigned long start, unsigned long end) { } /* Push the page at kernel virtual address and clear the icache */ extern inline void flush_page_to_ram (unsigned long address) { } /* Push n pages at kernel virtual address and clear the icache */ extern inline void flush_pages_to_ram (unsigned long address, int n) { } #endif /* _OR32_PGTABLE_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/posix_types.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/posix_types.h?rev=1.1&content-type=text/x-cvsweb-markup Index: posix_types.h =================================================================== #ifndef _OR32_POSIX_TYPES_H #define _OR32_POSIX_TYPES_H /* * This file is generally used by user-level software, so you need to * be a little careful about namespace pollution etc. Also, we cannot * assume GCC is being used. */ typedef unsigned short __kernel_dev_t; typedef unsigned long __kernel_ino_t; typedef unsigned short __kernel_mode_t; typedef unsigned short __kernel_nlink_t; typedef long __kernel_off_t; typedef int __kernel_pid_t; typedef unsigned short __kernel_uid_t; typedef unsigned short __kernel_gid_t; typedef unsigned long __kernel_size_t; typedef int __kernel_ssize_t; typedef int __kernel_ptrdiff_t; typedef long __kernel_time_t; typedef long __kernel_clock_t; typedef int __kernel_daddr_t; typedef char * __kernel_caddr_t; /* SIMON - or32-*-gcc currently doesn't support that */ /*#ifdef __GNUC__ typedef long long __kernel_loff_t; #endif */ typedef long __kernel_loff_t; typedef struct { #if defined(__KERNEL__) || defined(__USE_ALL) int val[2]; #else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ int __val[2]; #endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ } __kernel_fsid_t; #undef __FD_SET #define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) #undef __FD_CLR #define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) #undef __FD_ISSET #define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) #undef __FD_ZERO #define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp))) #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/processor.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/processor.h?rev=1.1&content-type=text/x-cvsweb-markup Index: processor.h =================================================================== #ifndef _ASM_OR32_PROCESSOR_H #define _ASM_OR32_PROCESSOR_H #include <linux/config.h> #include <asm/segment.h> #include <asm/ptrace.h> #include <asm/spr_defs.h> #include <asm/board.h> /* * Bus types */ #define EISA_bus__is_a_macro 1 #define EISA_bus 0 #define MCA_bus__is_a_macro 1 #define MCA_bus 0 /* * The or32 has no problems with write protection */ #define wp_works_ok__is_a_macro 1 #define wp_works_ok 1 /* MAX floating point unit state size (FSAVE/FRESTORE) */ #define FPSTATESIZE (216/sizeof(unsigned char)) struct thread_struct { unsigned long pc; /* PC when last entered system */ unsigned long sr; /* saved status register */ unsigned long ksp; /* kernel stack pointer */ unsigned long usp; /* user stack pointer */ unsigned long *regs; /* pointer to saved register state */ unsigned short fs; /* saved fs (sfc, dfc) */ unsigned long crp[2]; /* cpu root pointer */ unsigned long esp0; /* points to SR of stack frame */ unsigned long fp[8*3]; unsigned long fpcntl[3]; /* fp control regs */ unsigned char fpstate[FPSTATESIZE]; /* floating point state */ }; #define INIT_MMAP { &init_mm, 0, 0x40000000, __pgprot(_PAGE_PRESENT|_PAGE_ACCESSED), VM_READ | VM_WRITE | VM_EXEC } #define INIT_TSS { 0x100, \ ((DCACHE << SPR_SR_DCE_BIT) | \ (ICACHE << SPR_SR_ICE_BIT) | \ (DMMU << SPR_SR_DME_BIT) | \ (IMMU << SPR_SR_IME_BIT) | \ SPR_SR_IEE | \ SPR_SR_TEE | \ SPR_SR_SM), \ sizeof(init_kernel_stack) + (long) init_kernel_stack, \ } #define SR_USER \ ((DCACHE << SPR_SR_DCE_BIT) | \ (ICACHE << SPR_SR_ICE_BIT) | \ (DMMU << SPR_SR_DME_BIT) | \ (IMMU << SPR_SR_IME_BIT) | \ SPR_SR_IEE | \ SPR_SR_TEE) #define alloc_kernel_stack() __get_free_page(GFP_KERNEL) #define free_kernel_stack(page) free_page((page)) /* * Do necessary setup to start up a newly executed thread. */ static inline void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long usp) { #ifndef NO_MM unsigned long nilstate = 0; #endif /* reads from user space */ set_fs(USER_DS); regs->pc = pc; regs->sp = usp; regs->sr = SR_USER; } /* * Return saved PC of a blocked thread. */ extern inline unsigned long thread_saved_pc(struct thread_struct *t) { return t->pc; } #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/ptrace.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/ptrace.h?rev=1.1&content-type=text/x-cvsweb-markup Index: ptrace.h =================================================================== #ifndef _OR32_PTRACE_H #define _OR32_PTRACE_H #include <linux/config.h> /* get configuration macros */ #define STATE 0 #define COUNTER 4 #define SIGNAL 12 #define BLOCKED 16 #define TASK_FLAGS 20 #define TSS 528 #define TSS_PC 0 #define TSS_SR 4 #define TSS_KSP 8 #define TSS_USP 12 #define TSS_REGS 16 #define PC 0 #define SR 4 #define SP 8 #define GPR2 12 #define GPR3 16 #define GPR4 20 #define GPR5 24 #define GPR6 28 #define GPR7 32 #define GPR8 36 #define GPR9 40 #define GPR10 44 #define GPR11 48 #define GPR12 52 #define GPR13 56 #define GPR14 60 #define GPR15 64 #define GPR16 68 #define GPR17 72 #define GPR18 76 #define GPR19 80 #define GPR20 84 #define GPR21 88 #define GPR22 92 #define GPR23 96 #define GPR24 100 #define GPR25 104 #define GPR26 108 #define GPR27 112 #define GPR28 116 #define GPR29 120 #define GPR30 124 #define GPR31 128 #define ORIG_GPR3 132 #define RESULT 136 #define INT_FRAME_SIZE 140 #ifndef __ASSEMBLY__ /* this struct defines the way the registers are stored on the stack during a system call. */ struct pt_regs { long pc; long sr; long sp; long gprs[30]; long orig_gpr3; /* Used for restarting system calls */ long result; /* Result of a system call */ }; /* * This is the extended stack used by signal handlers and the context * switcher: it's pushed after the normal "struct pt_regs". */ /* SIMON: This is can not be like this */ /*struct switch_stack { unsigned long d6; unsigned long d7; unsigned long a2; unsigned long a3; unsigned long a4; unsigned long a5; unsigned long a6; unsigned long retpc; }; */ #ifdef __KERNEL__ #ifndef PS_S #define PS_S (0x2000) #define PS_M (0x1000) #endif #define user_mode(regs) (!((regs)->sr & SPR_SR_SM)) #define instruction_pointer(regs) ((regs)->pc) extern void show_regs(struct pt_regs *); #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ #endif /* _OR32_PTRACE_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/resource.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/resource.h?rev=1.1&content-type=text/x-cvsweb-markup Index: resource.h =================================================================== #ifndef _OR32_RESOURCE_H #define _OR32_RESOURCE_H /* * Resource limits */ #define RLIMIT_CPU 0 /* CPU time in ms */ #define RLIMIT_FSIZE 1 /* Maximum filesize */ #define RLIMIT_DATA 2 /* max data size */ #define RLIMIT_STACK 3 /* max stack size */ #define RLIMIT_CORE 4 /* max core file size */ #define RLIMIT_RSS 5 /* max resident set size */ #define RLIMIT_NPROC 6 /* max number of processes */ #define RLIMIT_NOFILE 7 /* max number of open files */ #define RLIMIT_MEMLOCK 8 /* max locked-in-memory address space*/ #define RLIMIT_AS 9 /* address space limit */ #define RLIM_NLIMITS 10 #ifdef __KERNEL__ #define INIT_RLIMITS \ { \ {LONG_MAX, LONG_MAX}, \ {LONG_MAX, LONG_MAX}, \ {LONG_MAX, LONG_MAX}, \ {_STK_LIM, _STK_LIM}, \ { 0, LONG_MAX}, \ {LONG_MAX, LONG_MAX}, \ {MAX_TASKS_PER_USER, MAX_TASKS_PER_USER}, \ {NR_OPEN, NR_OPEN}, \ {LONG_MAX, LONG_MAX}, \ {LONG_MAX, LONG_MAX} \ } #endif /* __KERNEL__ */ #endif /* _OR32_RESOURCE_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/segment.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/segment.h?rev=1.1&content-type=text/x-cvsweb-markup Index: segment.h =================================================================== #ifndef _OR32_SEGMENT_H #define _OR32_SEGMENT_H /* define constants */ /* Address spaces (FC0-FC2) */ #define USER_DATA (1) #ifndef USER_DS #define USER_DS (USER_DATA) #endif #define USER_PROGRAM (2) #define SUPER_DATA (5) #ifndef KERNEL_DS #define KERNEL_DS (SUPER_DATA) #endif #define SUPER_PROGRAM (6) #define CPU_SPACE (7) #ifndef __ASSEMBLY__ /* * Uh, these should become the main single-value transfer routines.. * They automatically use the right size if we just have the right * pointer type.. */ #define put_user(x,ptr) __put_user((unsigned long)(x),(ptr),sizeof(*(ptr))) #define get_user(ptr) ((__typeof__(*(ptr)))__get_user((ptr),sizeof(*(ptr)))) /* * This is a silly but good way to make sure that * the __put_user function is indeed always optimized, * and that we use the correct sizes.. */ extern int bad_user_access_length(void); #define __ptr(x) ((unsigned long *)(x)) static inline void __put_user(unsigned long x, void * y, int size) { switch (size) { case 1: *(char *) y = x; break; case 2: *(short *) y = x; break; case 4: *(int *) y = x; break; case 8: *(long *) y = x; break; default: bad_user_access_length(); } } static inline unsigned long __get_user(const void * y, int size) { switch (size) { case 1: return *(unsigned char *) y; case 2: return *(unsigned short *) y; case 4: return *(unsigned int *) y; case 8: return *(unsigned long *) y; default: return bad_user_access_length(); } } #undef __ptr /* * These are deprecated.. * * Use "put_user()" and "get_user()" with the proper pointer types instead. */ #define get_fs_byte(addr) __get_user((const unsigned char *)(addr),1) #define get_fs_word(addr) __get_user((const unsigned short *)(addr),2) #define get_fs_long(addr) __get_user((const unsigned int *)(addr),4) #define put_fs_byte(x,addr) __put_user((x),(unsigned char *)(addr),1) #define put_fs_word(x,addr) __put_user((x),(unsigned short *)(addr),2) #define put_fs_long(x,addr) __put_user((x),(unsigned int *)(addr),4) #ifdef WE_REALLY_WANT_TO_USE_A_BROKEN_INTERFACE static inline unsigned char get_user_byte(const char * addr) { return __get_user(addr,1); } static inline unsigned short get_user_word(const short *addr) { return __get_user(addr,2); } static inline unsigned long get_user_long(const int *addr) { return __get_user(addr,4); } static inline void put_user_byte(char val,char *addr) { __put_user(val, addr, 1); } static inline void put_user_word(short val,short * addr) { __put_user(val, addr, 2); } static inline void put_user_long(unsigned long val,int * addr) { __put_user(val, addr, 4); } #endif #define put_fs_quad(x,addr) put_user_quad((x),(long *)(addr)) #define memcpy_fromfs(to, from, n) memcpy((to),(from),(n)) #define memcpy_tofs(to, from, n) memcpy((to),(from),(n)) /* * Get/set the SFC/DFC registers for MOVES instructions */ static inline unsigned long get_fs(void) { return USER_DS; } static inline unsigned long get_ds(void) { /* return the supervisor data space code */ return KERNEL_DS; } static inline void set_fs(unsigned long val) { } #endif /* __ASSEMBLY__ */ #endif /* _OR32_SEGMENT_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/semaphore.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/semaphore.h?rev=1.1&content-type=text/x-cvsweb-markup Index: semaphore.h =================================================================== #ifndef _OR32_SEMAPHORE_H #define _OR32_SEMAPHORE_H /* * SMP- and interrupt-safe semaphores.. * * (C) Copyright 1996 Linus Torvalds * */ struct semaphore { int count; int waking; int lock; /* to make waking testing atomic */ struct wait_queue * wait; }; #define MUTEX ((struct semaphore) { 1, 0, 0, NULL }) #define MUTEX_LOCKED ((struct semaphore) { 0, 0, 0, NULL }) extern void down(struct semaphore * sem); extern int down_interruptible(struct semaphore * sem); extern void up(struct semaphore * sem); extern void get_buzz_lock(int *lock_ptr); extern void give_buzz_lock(int *lock_ptr); #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/shmparam.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/shmparam.h?rev=1.1&content-type=text/x-cvsweb-markup Index: shmparam.h =================================================================== #ifndef _OR32_SHMPARAM_H #define _OR32_SHMPARAM_H /* address range for shared memory attaches if no address passed to shmat() */ #define SHM_RANGE_START 0xC0000000 #define SHM_RANGE_END 0xD0000000 /* * Format of a swap-entry for shared memory pages currently out in * swap space (see also mm/swap.c). * * SWP_TYPE = SHM_SWP_TYPE * SWP_OFFSET is used as follows: * * bits 0..6 : id of shared memory segment page belongs to (SHM_ID) * bits 7..21: index of page within shared memory segment (SHM_IDX) * (actually fewer bits get used since SHMMAX is so low) */ /* * Keep _SHM_ID_BITS as low as possible since SHMMNI depends on it and * there is a static array of size SHMMNI. */ #define _SHM_ID_BITS 7 #define SHM_ID_MASK ((1<<_SHM_ID_BITS)-1) #define SHM_IDX_SHIFT (_SHM_ID_BITS) #define _SHM_IDX_BITS 15 #define SHM_IDX_MASK ((1<<_SHM_IDX_BITS)-1) /* * _SHM_ID_BITS + _SHM_IDX_BITS must be <= 24 on the i386 and * SHMMAX <= (PAGE_SIZE << _SHM_IDX_BITS). */ #define SHMMAX 0x1000000 /* max shared seg size (bytes) */ #define SHMMIN 1 /* really PAGE_SIZE */ /* min shared seg size (bytes) */ #define SHMMNI (1<<_SHM_ID_BITS) /* max num of segs system wide */ #define SHMALL /* max shm system wide (pages) */ \ (1<<(_SHM_IDX_BITS+_SHM_ID_BITS)) #define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ #define SHMSEG SHMMNI /* max shared segs per process */ #endif /* _OR32_SHMPARAM_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/sigcontext.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/sigcontext.h?rev=1.1&content-type=text/x-cvsweb-markup Index: sigcontext.h =================================================================== #ifndef _ASM_OR32_SIGCONTEXT_H #define _ASM_OR32_SIGCONTEXT_H struct sigcontext_struct { unsigned long _unused[4]; int signal; unsigned long handler; unsigned long oldmask; struct pt_regs *regs; }; #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/signal.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/signal.h?rev=1.1&content-type=text/x-cvsweb-markup Index: signal.h =================================================================== #ifndef _OR32_SIGNAL_H #define _OR32_SIGNAL_H typedef unsigned long sigset_t; /* at least 32 bits */ /* An evil possibility: 31 would let us store a signal_struct within 508 bytes */ #define _NSIG 32 #define NSIG _NSIG #define SIGHUP 1 #define SIGINT 2 #define SIGQUIT 3 #define SIGILL 4 #define SIGTRAP 5 #define SIGABRT 6 #define SIGIOT 6 #define SIGBUS 7 #define SIGFPE 8 #define SIGKILL 9 #define SIGUSR1 10 #define SIGSEGV 11 #define SIGUSR2 12 #define SIGPIPE 13 #define SIGALRM 14 #define SIGTERM 15 #define SIGSTKFLT 16 #define SIGCHLD 17 #define SIGCONT 18 #define SIGSTOP 19 #define SIGTSTP 20 #define SIGTTIN 21 #define SIGTTOU 22 #define SIGURG 23 #define SIGXCPU 24 #define SIGXFSZ 25 #define SIGVTALRM 26 #define SIGPROF 27 #define SIGWINCH 28 #define SIGIO 29 #define SIGPOLL SIGIO /* #define SIGLOST 29 */ #define SIGPWR 30 #define SIGUNUSED 31 /* * sa_flags values: SA_STACK is not currently supported, but will allow the * usage of signal stacks by using the (now obsolete) sa_restorer field in * the sigaction structure as a stack pointer. This is now possible due to * the changes in signal handling. LBT 010493. * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the * SA_RESTART flag to get restarting signals (which were the default long ago) * SA_SHIRQ flag is for shared interrupt support on PCI and EISA. */ #define SA_NOCLDSTOP 1 #define SA_SHIRQ 0x04000000 #define SA_STACK 0x08000000 #define SA_RESTART 0x10000000 #define SA_INTERRUPT 0x20000000 #define SA_NOMASK 0x40000000 #define SA_ONESHOT 0x80000000 #ifdef __KERNEL__ /* * These values of sa_flags are used only by the kernel as part of the * irq handling routines. * * SA_INTERRUPT is also used by the irq handling routines. */ #define SA_PROBE SA_ONESHOT #define SA_SAMPLE_RANDOM SA_RESTART #endif #define SIG_BLOCK 0 /* for blocking signals */ #define SIG_UNBLOCK 1 /* for unblocking signals */ #define SIG_SETMASK 2 /* for setting the signal mask */ /* Type of a signal handler. */ typedef void (*__sighandler_t)(int); #define SIG_DFL ((__sighandler_t)0) /* default signal handling */ #define SIG_IGN ((__sighandler_t)1) /* ignore signal */ #define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ struct sigaction { __sighandler_t sa_handler; sigset_t sa_mask; unsigned long sa_flags; void (*sa_restorer)(void); }; #ifdef __KERNEL__ #include <asm/sigcontext.h> #endif #endif /* _OR32_SIGNAL_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/socket.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/socket.h?rev=1.1&content-type=text/x-cvsweb-markup Index: socket.h =================================================================== #ifndef _ASM_SOCKET_H #define _ASM_SOCKET_H #include <asm/sockios.h> /* For setsockoptions(2) */ #define SOL_SOCKET 1 #define SO_DEBUG 1 #define SO_REUSEADDR 2 #define SO_TYPE 3 #define SO_ERROR 4 #define SO_DONTROUTE 5 #define SO_BROADCAST 6 #define SO_SNDBUF 7 #define SO_RCVBUF 8 #define SO_KEEPALIVE 9 #define SO_OOBINLINE 10 #define SO_NO_CHECK 11 #define SO_PRIORITY 12 #define SO_LINGER 13 #define SO_BSDCOMPAT 14 /* To add :#define SO_REUSEPORT 15 */ #define SO_BINDTODEVICE 25 #endif /* _ASM_SOCKET_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/sockios.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/sockios.h?rev=1.1&content-type=text/x-cvsweb-markup Index: sockios.h =================================================================== #ifndef __ARCH_OR32_SOCKIOS__ #define __ARCH_OR32_SOCKIOS__ /* Socket-level I/O control calls. */ #define FIOSETOWN 0x8901 #define SIOCSPGRP 0x8902 #define FIOGETOWN 0x8903 #define SIOCGPGRP 0x8904 #define SIOCATMARK 0x8905 #define SIOCGSTAMP 0x8906 /* Get stamp */ #endif /* __ARCH_OR32_SOCKIOS__ */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/spr_defs.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/spr_defs.h?rev=1.1&content-type=text/x-cvsweb-markup Index: spr_defs.h =================================================================== /* spr_defs.h -- Defines OR1K architecture specific special-purpose registers Copyright (C) 1999 Damjan Lampret, lampret@o... This file is part of OpenRISC 1000 Architectural Simulator. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ /* This file is also used by microkernel test bench. Among others it is also used in assembly file(s). */ /* Definition of special-purpose registers (SPRs) */ #ifndef _ASM_SPR_DEFS_H #define _ASM_SPR_DEFS_H #define MAX_GRPS (32) #define MAX_SPRS_PER_GRP_BITS (11) #define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS) #define MAX_SPRS (0x10000) /* Base addresses for the groups */ #define SPRGROUP_SYS (0<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_DMMU (1<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_IMMU (2<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_DC (3<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_IC (4<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_MAC (5<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_D (6<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_PC (7<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_PM (8<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_PIC (9<< MAX_SPRS_PER_GRP_BITS) #define SPRGROUP_TT (10<< MAX_SPRS_PER_GRP_BITS) /* System control and status group */ #define SPR_VR (SPRGROUP_SYS + 0) #define SPR_UPR (SPRGROUP_SYS + 1) #define SPR_PC (SPRGROUP_SYS + 16) /* CZ 21/06/01 */ #define SPR_SR (SPRGROUP_SYS + 17) /* CZ 21/06/01 */ #define SPR_EPCR_BASE (SPRGROUP_SYS + 32) /* CZ 21/06/01 */ #define SPR_EPCR_LAST (SPRGROUP_SYS + 47) /* CZ 21/06/01 */ #define SPR_EEAR_BASE (SPRGROUP_SYS + 48) #define SPR_EEAR_LAST (SPRGROUP_SYS + 63) #define SPR_ESR_BASE (SPRGROUP_SYS + 64) #define SPR_ESR_LAST (SPRGROUP_SYS + 79) #if 0 /* Data MMU group */ #define SPR_DMMUCR (SPRGROUP_DMMU + 0) #define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x200) #define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x200) #define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x300 + (WAY) * 0x200) #define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x3ff + (WAY) * 0x200) /* Instruction MMU group */ #define SPR_IMMUCR (SPRGROUP_IMMU + 0) #define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x200) #define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x200) #define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x300 + (WAY) * 0x200) #define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x3ff + (WAY) * 0x200) #else /* Data MMU group */ #define SPR_DMMUCR (SPRGROUP_DMMU + 0) #define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) #define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) #define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) #define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) /* Instruction MMU group */ #define SPR_IMMUCR (SPRGROUP_IMMU + 0) #define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) #define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100) #define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100) #define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100) #endif /* Data cache group */ #define SPR_DCCR (SPRGROUP_DC + 0) #define SPR_DCBPR (SPRGROUP_DC + 1) #define SPR_DCBFR (SPRGROUP_DC + 2) #define SPR_DCBIR (SPRGROUP_DC + 3) #define SPR_DCBWR (SPRGROUP_DC + 4) #define SPR_DCBLR (SPRGROUP_DC + 5) #define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200) #define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200) /* Instruction cache group */ #define SPR_ICCR (SPRGROUP_IC + 0) #define SPR_ICBPR (SPRGROUP_IC + 1) #define SPR_ICBIR (SPRGROUP_IC + 2) #define SPR_ICBLR (SPRGROUP_IC + 3) #define SPR_ICR_BASE(WAY) (SPRGROUP_IC + 0x200 + (WAY) * 0x200) #define SPR_ICR_LAST(WAY) (SPRGROUP_IC + 0x3ff + (WAY) * 0x200) /* MAC group */ #define SPR_MACLO (SPRGROUP_MAC + 1) #define SPR_MACHI (SPRGROUP_MAC + 2) /* Debug group */ #define SPR_DVR(N) (SPRGROUP_D + (N)) #define SPR_DCR(N) (SPRGROUP_D + 8 + (N)) #define SPR_DMR1 (SPRGROUP_D + 16) #define SPR_DMR2 (SPRGROUP_D + 17) #define SPR_DWCR0 (SPRGROUP_D + 18) #define SPR_DWCR1 (SPRGROUP_D + 19) #define SPR_DSR (SPRGROUP_D + 20) #define SPR_DRR (SPRGROUP_D + 21) #define SPR_DIR (SPRGROUP_D + 22) /* Performance counters group */ #define SPR_PCCR(N) (SPRGROUP_PC + (N)) #define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N)) /* Power management group */ #define SPR_PMR (SPRGROUP_PM + 0) /* PIC group */ #define SPR_PICMR (SPRGROUP_PIC + 0) #define SPR_PICPR (SPRGROUP_PIC + 1) #define SPR_PICSR (SPRGROUP_PIC + 2) /* Tick Timer group */ #define SPR_TTMR (SPRGROUP_TT + 0) #define SPR_TTCR (SPRGROUP_TT + 1) /* * Bit definitions for the Version Register * */ #define SPR_VR_VER 0xffff0000 /* Processor version */ #define SPR_VR_REV 0x0000003f /* Processor revision */ /* * Bit definitions for the Unit Present Register * */ #define SPR_UPR_UP 0x00000001 /* UPR present */ #define SPR_UPR_DCP 0x00000002 /* Data cache present */ #define SPR_UPR_ICP 0x00000004 /* Instruction cache present */ #define SPR_UPR_DMP 0x00000008 /* Data MMU present */ #define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */ #define SPR_UPR_OB32P 0x00000020 /* ORBIS32 present */ #define SPR_UPR_OB64P 0x00000040 /* ORBIS64 present */ #define SPR_UPR_OF32P 0x00000080 /* ORFPX32 present */ #define SPR_UPR_OF64P 0x00000100 /* ORFPX64 present */ #define SPR_UPR_OV32P 0x00000200 /* ORVDX32 present */ #define SPR_UPR_OV64P 0x00000400 /* ORVDX64 present */ #define SPR_UPR_DUP 0x00000800 /* Debug unit present */ #define SPR_UPR_PCUP 0x00001000 /* Performance counters unit present */ #define SPR_UPR_PMP 0x00002000 /* Power management present */ #define SPR_UPR_PICP 0x00004000 /* PIC present */ #define SPR_UPR_TTP 0x00008000 /* Tick timer present */ #define SPR_UPR_SRP 0x00010000 /* Shadow registers present */ #define SPR_UPR_RES 0x00fe0000 /* ORVDX32 present */ #define SPR_UPR_CUST 0xff000000 /* Custom units */ /* * Bit definitions for the Supervision Register * */ #define SPR_SR_CID 0xf0000000 /* Context ID */ #define SPR_SR_FO 0x00008000 /* Fixed one */ #define SPR_SR_EPH 0x00004000 /* Exception Prefixi High */ #define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */ #define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */ #define SPR_SR_OV 0x00000800 /* Overflow flag */ #define SPR_SR_CY 0x00000400 /* Carry flag */ #define SPR_SR_F 0x00000200 /* Condition Flag */ #define SPR_SR_CE 0x00000100 /* CID Enable */ #define SPR_SR_LEE 0x00000080 /* Little Endian Enable */ #define SPR_SR_IME 0x00000040 /* Instruction MMU Enable */ #define SPR_SR_DME 0x00000020 /* Data MMU Enable */ #define SPR_SR_ICE 0x00000010 /* Instruction Cache Enable */ #define SPR_SR_DCE 0x00000008 /* Data Cache Enable */ #define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */ #define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */ #define SPR_SR_SM 0x00000001 /* Supervisor Mode */ #define SPR_SR_FO_BIT 15 #define SPR_SR_EPH_BIT 14 #define SPR_SR_DSX_BIT 13 #define SPR_SR_OVE_BIT 12 #define SPR_SR_OV_BIT 11 #define SPR_SR_CY_BIT 10 #define SPR_SR_F_BIT 9 #define SPR_SR_CE_BIT 8 #define SPR_SR_LEE_BIT 7 #define SPR_SR_IME_BIT 6 #define SPR_SR_DME_BIT 5 #define SPR_SR_ICE_BIT 4 #define SPR_SR_DCE_BIT 3 #define SPR_SR_IEE_BIT 2 #define SPR_SR_TEE_BIT 1 #define SPR_SR_SM_BIT 0 /* * Bit definitions for the Data MMU Control Register * */ #define SPR_DMMUCR_P2S 0x0000003e /* Level 2 Page Size */ #define SPR_DMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ #define SPR_DMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ #define SPR_DMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ /* * Bit definitions for the Instruction MMU Control Register * */ #define SPR_IMMUCR_P2S 0x0000003e /* Level 2 Page Size */ #define SPR_IMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ #define SPR_IMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ #define SPR_IMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ /* * Bit definitions for the Data TLB Match Register * */ #define SPR_DTLBMR_V 0x00000001 /* Valid */ #define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ #define SPR_DTLBMR_CID 0x0000003c /* Context ID */ #define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */ #define SPR_DTLBMR_VPN 0xfffff000 /* Virtual Page Number */ /* * Bit definitions for the Data TLB Translate Register * */ #define SPR_DTLBTR_CC 0x00000001 /* Cache Coherency */ #define SPR_DTLBTR_CI 0x00000002 /* Cache Inhibit */ #define SPR_DTLBTR_WBC 0x00000004 /* Write-Back Cache */ #define SPR_DTLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ #define SPR_DTLBTR_A 0x00000010 /* Accessed */ #define SPR_DTLBTR_D 0x00000020 /* Dirty */ #define SPR_DTLBTR_URE 0x00000040 /* User Read Enable */ #define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */ #define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */ #define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */ #define SPR_DTLBTR_PPN 0xfffff000 /* Physical Page Number */ #define DTLBTR_NO_LIMIT ( SPR_DTLBTR_URE | \ SPR_DTLBTR_UWE | \ SPR_DTLBTR_SRE | \ SPR_DTLBTR_SWE ) /* * Bit definitions for the Instruction TLB Match Register * */ #define SPR_ITLBMR_V 0x00000001 /* Valid */ #define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ #define SPR_ITLBMR_CID 0x0000003c /* Context ID */ #define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */ #define SPR_ITLBMR_VPN 0xfffff000 /* Virtual Page Number */ /* * Bit definitions for the Instruction TLB Translate Register * */ #define SPR_ITLBTR_CC 0x00000001 /* Cache Coherency */ #define SPR_ITLBTR_CI 0x00000002 /* Cache Inhibit */ #define SPR_ITLBTR_WBC 0x00000004 /* Write-Back Cache */ #define SPR_ITLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ #define SPR_ITLBTR_A 0x00000010 /* Accessed */ #define SPR_ITLBTR_D 0x00000020 /* Dirty */ #define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */ #define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */ #define SPR_ITLBTR_PPN 0xfffff000 /* Physical Page Number */ #define ITLBTR_NO_LIMIT (SPR_ITLBTR_SXE | SPR_ITLBTR_UXE) /* * Bit definitions for Data Cache Control register * */ #define SPR_DCCR_EW 0x000000ff /* Enable ways */ /* * Bit definitions for Insn Cache Control register * */ #define SPR_ICCR_EW 0x000000ff /* Enable ways */ /* * Bit definitions for Debug Control registers * */ #define SPR_DCR_DP 0x00000001 /* DVR/DCR present */ #define SPR_DCR_CC 0x0000000e /* Compare condition */ #define SPR_DCR_SC 0x00000010 /* Signed compare */ #define SPR_DCR_CT 0x000000e0 /* Compare to */ /* * Bit definitions for Debug Mode 1 register * */ #define SPR_DMR1_CW0 0x00000003 /* Chain watchpoint 0 */ #define SPR_DMR1_CW1 0x0000000c /* Chain watchpoint 1 */ #define SPR_DMR1_CW2 0x00000030 /* Chain watchpoint 2 */ #define SPR_DMR1_CW3 0x000000c0 /* Chain watchpoint 3 */ #define SPR_DMR1_CW4 0x00000300 /* Chain watchpoint 4 */ #define SPR_DMR1_CW5 0x00000c00 /* Chain watchpoint 5 */ #define SPR_DMR1_CW6 0x00003000 /* Chain watchpoint 6 */ #define SPR_DMR1_CW7 0x0000c000 /* Chain watchpoint 7 */ #define SPR_DMR1_CW8 0x00030000 /* Chain watchpoint 8 */ #define SPR_DMR1_CW9 0x000c0000 /* Chain watchpoint 9 */ #define SPR_DMR1_CW10 0x00300000 /* Chain watchpoint 10 */ #define SPR_DMR1_ST 0x00400000 /* Single-step trace*/ #define SPR_DMR1_BT 0x00800000 /* Branch trace */ #define SPR_DMR1_DXFW 0x01000000 /* Disable external force watchpoint */ /* * Bit definitions for Debug Mode 2 register * */ #define SPR_DMR2_WCE0 0x00000001 /* Watchpoint counter 0 enable */ #define SPR_DMR2_WCE1 0x00000002 /* Watchpoint counter 0 enable */ #define SPR_DMR2_AWTC 0x00001ffc /* Assign watchpoints to counters */ #define SPR_DMR2_WGB 0x00ffe000 /* Watchpoints generating breakpoint */ /* * Bit definitions for Debug watchpoint counter registers * */ #define SPR_DWCR_COUNT 0x0000ffff /* Count */ #define SPR_DWCR_MATCH 0xffff0000 /* Match */ /* * Bit definitions for Debug stop register * */ #define SPR_DSR_RSTE 0x00000001 /* Reset exception */ #define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */ #define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */ #define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */ #define SPR_DSR_LPINTE 0x00000010 /* Low priority interrupt exception */ #define SPR_DSR_AE 0x00000020 /* Alignment exception */ #define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */ #define SPR_DSR_HPINTE 0x00000080 /* High priority interrupt exception */ #define SPR_DSR_DME 0x00000100 /* DTLB miss exception */ #define SPR_DSR_IME 0x00000200 /* ITLB miss exception */ #define SPR_DSR_RE 0x00000400 /* Range exception */ #define SPR_DSR_SCE 0x00000800 /* System call exception */ #define SPR_DSR_BE 0x00001000 /* Breakpoint exception */ /* * Bit definitions for Debug reason register * */ #define SPR_DRR_RSTE 0x00000001 /* Reset exception */ #define SPR_DRR_BUSEE 0x00000002 /* Bus error exception */ #define SPR_DRR_DPFE 0x00000004 /* Data Page Fault exception */ #define SPR_DRR_IPFE 0x00000008 /* Insn Page Fault exception */ #define SPR_DRR_LPINTE 0x00000010 /* Low priority interrupt exception */ #define SPR_DRR_AE 0x00000020 /* Alignment exception */ #define SPR_DRR_IIE 0x00000040 /* Illegal Instruction exception */ #define SPR_DRR_HPINTE 0x00000080 /* High priority interrupt exception */ #define SPR_DRR_DME 0x00000100 /* DTLB miss exception */ #define SPR_DRR_IME 0x00000200 /* ITLB miss exception */ #define SPR_DRR_RE 0x00000400 /* Range exception */ #define SPR_DRR_SCE 0x00000800 /* System call exception */ #define SPR_DRR_BE 0x00001000 /* Breakpoint exception */ /* * Bit definitions for Performance counters mode registers * */ #define SPR_PCMR_CP 0x00000001 /* Counter present */ #define SPR_PCMR_UMRA 0x00000002 /* User mode read access */ #define SPR_PCMR_CISM 0x00000004 /* Count in supervisor mode */ #define SPR_PCMR_CIUM 0x00000008 /* Count in user mode */ #define SPR_PCMR_LA 0x00000010 /* Load access event */ #define SPR_PCMR_SA 0x00000020 /* Store access event */ #define SPR_PCMR_IF 0x00000040 /* Instruction fetch event*/ #define SPR_PCMR_DCM 0x00000080 /* Data cache miss event */ #define SPR_PCMR_ICM 0x00000100 /* Insn cache miss event */ #define SPR_PCMR_IFS 0x00000200 /* Insn fetch stall event */ #define SPR_PCMR_LSUS 0x00000400 /* LSU stall event */ #define SPR_PCMR_BS 0x00000800 /* Branch stall event */ #define SPR_PCMR_DTLBM 0x00001000 /* DTLB miss event */ #define SPR_PCMR_ITLBM 0x00002000 /* ITLB miss event */ #define SPR_PCMR_DDS 0x00004000 /* Data dependency stall event */ #define SPR_PCMR_WPE 0x03ff8000 /* Watchpoint events */ /* * Bit definitions for the Power management register * */ #define SPR_PMR_SDF 0x00000001 /* Slow down factor */ #define SPR_PMR_DME 0x00000002 /* Doze mode enable */ #define SPR_PMR_SME 0x00000004 /* Sleep mode enable */ #define SPR_PMR_DCGE 0x00000008 /* Dynamic clock gating enable */ #define SPR_PMR_SUME 0x00000010 /* Suspend mode enable */ /* * Bit definitions for PICMR * */ #define SPR_PICMR_IUM 0xfffffffc /* Interrupt unmask */ /* * Bit definitions for PICPR * */ #define SPR_PICPR_IPRIO 0xfffffffc /* Interrupt priority */ /* * Bit definitions for PICSR * */ #define SPR_PICSR_IS 0xffffffff /* Interrupt status */ /* * Bit definitions for Tick Timer Control Register * */ #define SPR_TTCR_PERIOD 0x0fffffff /* Time Period */ #define SPR_TTMR_PERIOD SPR_TTCR_PERIOD #define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */ #define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */ #define SPR_TTMR_RT 0x40000000 /* Restart tick */ #define SPR_TTMR_SR 0x80000000 /* Single run */ #define SPR_TTMR_CR 0xc0000000 /* Continuous run */ #define SPR_TTMR_M 0xc0000000 /* Tick mode */ #endif 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/stat.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/stat.h?rev=1.1&content-type=text/x-cvsweb-markup Index: stat.h =================================================================== #ifndef _OR32_STAT_H #define _OR32_STAT_H struct old_stat { unsigned short st_dev; unsigned short st_ino; unsigned short st_mode; unsigned short st_nlink; unsigned short st_uid; unsigned short st_gid; unsigned short st_rdev; unsigned long st_size; unsigned long st_atime; unsigned long st_mtime; unsigned long st_ctime; }; struct new_stat { unsigned short st_dev; unsigned short __pad1; unsigned long st_ino; unsigned short st_mode; unsigned short st_nlink; unsigned short st_uid; unsigned short st_gid; unsigned short st_rdev; unsigned short __pad2; unsigned long st_size; unsigned long st_blksize; unsigned long st_blocks; unsigned long st_atime; unsigned long __unused1; unsigned long st_mtime; unsigned long __unused2; unsigned long st_ctime; unsigned long __unused3; unsigned long __unused4; unsigned long __unused5; }; #endif /* _OR32_STAT_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/statfs.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/statfs.h?rev=1.1&content-type=text/x-cvsweb-markup Index: statfs.h =================================================================== #ifndef _OR32_STATFS_H #define _OR32_STATFS_H #ifndef __KERNEL_STRICT_NAMES #include <linux/types.h> typedef __kernel_fsid_t fsid_t; #endif struct statfs { long f_type; long f_bsize; long f_blocks; long f_bfree; long f_bavail; long f_files; long f_ffree; __kernel_fsid_t f_fsid; long f_namelen; long f_spare[6]; }; #endif /* _OR32_STATFS_H */ 1.1 or1k/rc203soc/sw/uClinux/include/asm-or32/string.h http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-or32/string.h?rev=1.1&content-type=text/x-cvsweb-markup Index: string.h =================================================================== #ifndef _OR32_STRING_H_ #define _OR32_STRING_H_ #include <linux/config.h> #include <asm/page.h> #define __HAVE_ARCH_MEMSET extern inline void * memset(void * s,int c,__kernel_size_t count) { char *xs = (char *) s; while (count--) *xs++ = c; return s; } #define __HAVE_ARCH_STRSTR /*