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Message
From: cvs at opencores.org<cvs@o...>
Date: Tue Dec 20 12:27:57 CET 2005
Subject: [cvs-checkins] MODIFIED: or1k ...
Date: 00/05/12 20:12:27 Added: or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k
a.out.h dma.h hardware.h io.h irq.h irqs.h mmu.h
oldlatches.h processor.h serial.h shmparam.h
system.h time.h uncompress.h
Log:
First Import of RC20x uClinux
Revision Changes Path
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/a.out.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/a.out.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: a.out.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/a.out.h
*
* Copyright (C) 1996 Russell King
*/
#ifndef __ASM_ARCH_A_OUT_H
#define __ASM_ARCH_A_OUT_H
#ifdef __KERNEL__
#define STACK_TOP (0x01a00000)
#define LIBRARY_START_TEXT (0x00c00000)
#endif
#endif
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/dma.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/dma.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: dma.h
===================================================================
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
/*
* This is the maximum DMA address that can be DMAd to.
*/
#define MAX_DMA_ADDRESS 0x03000000
/*
* DMA modes - we have two, IN and OUT
*/
typedef enum {
DMA_MODE_READ,
DMA_MODE_WRITE
} dmamode_t;
#define MAX_DMA_CHANNELS 2
#define DMA_VIRTUAL_FLOPPY 0
#define DMA_VIRTUAL_SOUND 1
#define DMA_FLOPPY DMA_VIRTUAL_FLOPPY
#endif /* _ASM_ARCH_DMA_H */
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/hardware.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/hardware.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: hardware.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/hardware.h
*
* Copyright (C) 1996 Russell King.
*
* This file contains the hardware definitions of the A5000 series machines.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
/*
* What hardware must be present
*/
#define HAS_IOC
#define HAS_MEMC
#define HAS_MEMC1A
#define HAS_VIDC
/*
* Optional hardware
*/
#define HAS_EXPMASK
#define IO_START 0x03000000
#define IO_SIZE 0x01000000
#define IO_BASE 0x03000000
#define SCREEN_START 0x02000000 /* Screen */
#define SCREEN2_END 0x02078000
#define SCREEN2_BASE 0x02000000
#define SCREEN1_END 0x02000000
#define SCREEN1_BASE 0x01f88000
#ifndef __ASSEMBLER__
/*
* for use with inb/outb
*/
#define IO_VIDC_BASE 0x80100000
#define IO_IOC_BASE 0x80080000
#define IO_EC_IOC4_BASE 0x8009c000
#define IO_EC_IOC_BASE 0x80090000
#define IO_EC_MEMC_BASE 0x80000000
/*
* IO definitions
*/
#define EXPMASK_BASE ((volatile unsigned char *)0x03360000)
#define IOEB_BASE ((volatile unsigned char *)0x03350050)
#define PCIO_FLOPPYDMABASE ((volatile unsigned char *)0x0302a000)
#define PCIO_BASE 0x03010000
/*
* RAM definitions
*/
#define MAPTOPHYS(a) (((unsigned long)a & 0x007fffff) + PAGE_OFFSET)
#define KERNTOPHYS(a) ((((unsigned long)(&a)) & 0x007fffff) + PAGE_OFFSET)
#define GET_MEMORY_END(p) (PAGE_OFFSET + (p->u1.s.page_size) * (p->u1.s.nr_pages))
#define PARAMS_BASE (PAGE_OFFSET + 0x7c000)
#define KERNEL_BASE (PAGE_OFFSET + 0x80000)
#else
#define IOEB_BASE 0x03350050
#define IOC_BASE 0x03200000
#define PCIO_FLOPPYDMABASE 0x0302a000
#define PCIO_BASE 0x03010000
#endif
#endif
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/io.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/io.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: io.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/io.h
*
* Copyright (C) 1997 Russell King
*
* Modifications:
* 06-Dec-1997 RMK Created.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
/*
* This architecture does not require any delayed IO, and
* has the constant-optimised IO
*/
#undef ARCH_IO_DELAY
/*
* We use two different types of addressing - PC style addresses, and ARM
* addresses. PC style accesses the PC hardware with the normal PC IO
* addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
* and are translated to the start of IO. Note that all addresses are
* shifted left!
*/
#define __PORT_PCIO(x) (!((x) & 0x80000000))
/*
* Dynamic IO functions - let the compiler
* optimize the expressions
*/
extern __inline__ void __outb (unsigned int value, unsigned int port)
{
unsigned long temp;
__asm__ __volatile__(
"tst %2, #0x80000000\n\t"
"mov %0, %4\n\t"
"addeq %0, %0, %3\n\t"
"strb %1, [%0, %2, lsl #2]"
: "=&r" (temp)
: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
: "cc");
}
extern __inline__ void __outw (unsigned int value, unsigned int port)
{
unsigned long temp;
__asm__ __volatile__(
"tst %2, #0x80000000\n\t"
"mov %0, %4\n\t"
"addeq %0, %0, %3\n\t"
"str %1, [%0, %2, lsl #2]"
: "=&r" (temp)
: "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
: "cc");
}
extern __inline__ void __outl (unsigned int value, unsigned int port)
{
unsigned long temp;
__asm__ __volatile__(
"tst %2, #0x80000000\n\t"
"mov %0, %4\n\t"
"addeq %0, %0, %3\n\t"
"str %1, [%0, %2, lsl #2]"
: "=&r" (temp)
: "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
: "cc");
}
#define DECLARE_DYN_IN(sz,fnsuffix,instr) \
extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \
{ \
unsigned long temp, value; \
__asm__ __volatile__( \
"tst %2, #0x80000000\n\t" \
"mov %0, %4\n\t" \
"addeq %0, %0, %3\n\t" \
"ldr" ##instr## " %1, [%0, %2, lsl #2]" \
: "=&r" (temp), "=r" (value) \
: "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
: "cc"); \
return (unsigned sz)value; \
}
extern __inline__ unsigned int __ioaddr (unsigned int port) \
{ \
if (__PORT_PCIO(port)) \
return (unsigned int)(PCIO_BASE + (port << 2)); \
else \
return (unsigned int)(IO_BASE + (port << 2)); \
}
DECLARE_DYN_IN(char,b,"b")
DECLARE_DYN_IN(short,w,"")
DECLARE_DYN_IN(long,l,"")
#undef DECLARE_DYN_IN
/*
* Constant address IO functions
*
* These have to be macros for the 'J' constraint to work -
* +/-4096 immediate operand.
*/
#define __outbc(value,port) \
({ \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"strb %0, [%1, %2]" \
: : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"strb %0, [%1, %2]" \
: : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \
})
#define __inbc(port) \
({ \
unsigned char result; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"ldrb %0, [%1, %2]" \
: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"ldrb %0, [%1, %2]" \
: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
result; \
})
#define __outwc(value,port) \
({ \
unsigned long v = value; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"str %0, [%1, %2]" \
: : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"str %0, [%1, %2]" \
: : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \
})
#define __inwc(port) \
({ \
unsigned short result; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"ldr %0, [%1, %2]" \
: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"ldr %0, [%1, %2]" \
: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
result & 0xffff; \
})
#define __outlc(v,p) __outwc((v),(p))
#define __inlc(port) \
({ \
unsigned long result; \
if (__PORT_PCIO((port))) \
__asm__ __volatile__( \
"ldr %0, [%1, %2]" \
: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
else \
__asm__ __volatile__( \
"ldr %0, [%1, %2]" \
: "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
result; \
})
#define __ioaddrc(port) \
({ \
unsigned long addr; \
if (__PORT_PCIO((port))) \
addr = PCIO_BASE + ((port) << 2); \
else \
addr = IO_BASE + ((port) << 2); \
addr; \
})
/*
* Translated address IO functions
*
* IO address has already been translated to a virtual address
*/
#define outb_t(v,p) \
(*(volatile unsigned char *)(p) = (v))
#define inb_t(p) \
(*(volatile unsigned char *)(p))
#define outl_t(v,p) \
(*(volatile unsigned long *)(p) = (v))
#define inl_t(p) \
(*(volatile unsigned long *)(p))
#endif
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/irq.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/irq.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: irq.h
===================================================================
/*
* include/asm-arm/arch-a5k/irq.h
*
* Copyright (C) 1996 Russell King
*
* Changelog:
* 24-09-1996 RMK Created
* 10-10-1996 RMK Brought up to date with arch-sa110eval
* 22-10-1996 RMK Changed interrupt numbers & uses new inb/outb macros
*/
#define BUILD_IRQ(s,n,m) \
void IRQ##n##_interrupt(void); \
void fast_IRQ##n##_interrupt(void); \
void bad_IRQ##n##_interrupt(void); \
void probe_IRQ##n##_interrupt(void);
/*
* The timer is a special interrupt
*/
#define IRQ5_interrupt timer_IRQ_interrupt
#define IRQ_INTERRUPT(n) IRQ##n##_interrupt
#define FAST_INTERRUPT(n) fast_IRQ##n##_interrupt
#define BAD_INTERRUPT(n) bad_IRQ##n##_interrupt
#define PROBE_INTERRUPT(n) probe_IRQ##n##_interrupt
static __inline__ void mask_irq(unsigned int irq)
{
extern void ecard_disableirq (unsigned int);
extern void ecard_disablefiq (unsigned int);
unsigned char mask = 1 << (irq & 7);
switch (irq >> 3) {
case 0:
outb(inb(IOC_IRQMASKA) & ~mask, IOC_IRQMASKA);
break;
case 1:
outb(inb(IOC_IRQMASKB) & ~mask, IOC_IRQMASKB);
break;
case 4:
ecard_disableirq (irq & 7);
break;
case 8:
outb(inb(IOC_FIQMASK) & ~mask, IOC_FIQMASK);
break;
case 12:
ecard_disablefiq (irq & 7);
}
}
static __inline__ void unmask_irq(unsigned int irq)
{
extern void ecard_enableirq (unsigned int);
extern void ecard_enablefiq (unsigned int);
unsigned char mask = 1 << (irq & 7);
switch (irq >> 3) {
case 0:
outb(inb(IOC_IRQMASKA) | mask, IOC_IRQMASKA);
break;
case 1:
outb(inb(IOC_IRQMASKB) | mask, IOC_IRQMASKB);
break;
case 4:
ecard_enableirq (irq & 7);
break;
case 8:
outb(inb(IOC_FIQMASK) | mask, IOC_FIQMASK);
break;
case 12:
ecard_enablefiq (irq & 7);
}
}
static __inline__ unsigned long get_enabled_irqs(void)
{
return inb(IOC_IRQMASKA) | inb(IOC_IRQMASKB) << 8;
}
static __inline__ void irq_init_irq(void)
{
outb(0, IOC_IRQMASKA);
outb(0, IOC_IRQMASKB);
outb(0, IOC_FIQMASK);
}
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/irqs.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/irqs.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: irqs.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/irqs.h
*
* Copyright (C) 1996 Russell King
*/
#define IRQ_PRINTER 0
#define IRQ_BATLOW 1
#define IRQ_FLOPPYINDEX 2
#define IRQ_VSYNCPULSE 3
#define IRQ_POWERON 4
#define IRQ_TIMER0 5
#define IRQ_TIMER1 6
#define IRQ_IMMEDIATE 7
#define IRQ_EXPCARDFIQ 8
#define IRQ_SOUNDCHANGE 9
#define IRQ_SERIALPORT 10
#define IRQ_HARDDISK 11
#define IRQ_FLOPPYDISK 12
#define IRQ_EXPANSIONCARD 13
#define IRQ_KEYBOARDTX 14
#define IRQ_KEYBOARDRX 15
#define FIQ_FLOPPYDATA 0
#define FIQ_ECONET 2
#define FIQ_SERIALPORT 4
#define FIQ_EXPANSIONCARD 6
#define FIQ_FORCE 7
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/mmu.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/mmu.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: mmu.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/mmu.h
*
* Copyright (c) 1996 Russell King.
*
* Changelog:
* 22-11-1996 RMK Created
*/
#ifndef __ASM_ARCH_MMU_H
#define __ASM_ARCH_MMU_H
#define __virt_to_phys__is_a_macro
#define __virt_to_phys(vpage) vpage
#define __phys_to_virt__is_a_macro
#define __phys_to_virt(ppage) ppage
#define __virt_to_bus__is_a_macro
#define __virt_to_bus(vpage) vpage
#define __bus_to_virt__is_a_macro
#define __bus_to_virt(ppage) ppage
#endif
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/oldlatches.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/oldlatches.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: oldlatches.h
===================================================================
/*
* Dummy oldlatches.h
*
* Copyright (C) 1996 Russell King
*/
#ifdef __need_oldlatches
#error "Old latches not present in this (a5k) machine"
#endif
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/processor.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/processor.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: processor.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/processor.h
*
* Copyright (c) 1996 Russell King.
*
* Changelog:
* 10-09-1996 RMK Created
*/
#ifndef __ASM_ARCH_PROCESSOR_H
#define __ASM_ARCH_PROCESSOR_H
/*
* Bus types
*/
#define EISA_bus 0
#define EISA_bus__is_a_macro /* for versions in ksyms.c */
#define MCA_bus 0
#define MCA_bus__is_a_macro /* for versions in ksyms.c */
/*
* User space: 26MB
*/
#define TASK_SIZE (0x01a00000UL)
#define INIT_MMAP { &init_mm, 0, 0x02000000, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC }
#endif
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/serial.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/serial.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: serial.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/serial.h
*
* Copyright (c) 1996 Russell King.
*
* Changelog:
* 15-10-1996 RMK Created
*/
#ifndef __ASM_ARCH_SERIAL_H
#define __ASM_ARCH_SERIAL_H
/*
* This assumes you have a 1.8432 MHz clock for your UART.
*
* It'd be nice if someone built a serial card with a 24.576 MHz
* clock, since the 16550A is capable of handling a top speed of 1.5
* megabits/second; but this requires the faster clock.
*/
#define BASE_BAUD (1843200 / 16)
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
/* UART CLK PORT IRQ FLAGS */
#define RS_UARTS \
{ 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS }, /* ttyS0 */ \
{ 0, BASE_BAUD, 0x2F8, 10, STD_COM_FLAGS }, /* ttyS1 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS2 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS3 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS4 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS5 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS6 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS7 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS8 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS9 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS10 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS11 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS12 */ \
{ 0, BASE_BAUD, 0 , 0, STD_COM_FLAGS }, /* ttyS13 */
#endif
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/shmparam.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/shmparam.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: shmparam.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/shmparam.h
*
* Copyright (c) 1996 Russell King.
*/
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/system.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/system.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: system.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/system.h
*
* Copyright (c) 1996 Russell King
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
extern __inline__ void arch_hard_reset (void)
{
extern void ecard_reset (int card);
/*
* Reset all expansion cards.
*/
ecard_reset (-1);
/*
* copy branch instruction to reset location and call it
*/
*(unsigned long *)0 = *(unsigned long *)0x03800000;
((void(*)(void))0)();
/*
* If that didn't work, loop endlessly
*/
while (1);
}
#endif
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/time.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/time.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: time.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/time.h
*
* Copyright (c) 1996 Russell King.
*
* Changelog:
* 24-Sep-1996 RMK Created
* 10-Oct-1996 RMK Brought up to date with arch-sa110eval
* 04-Dec-1997 RMK Updated for new arch/arm/time.c
*/
extern __inline__ unsigned long gettimeoffset (void)
{
unsigned int count1, count2, status1, status2;
unsigned long offset = 0;
status1 = inb(IOC_IRQREQA);
barrier ();
outb (0, IOC_T0LATCH);
barrier ();
count1 = inb(IOC_T0CNTL) | (inb(IOC_T0CNTH) << 8);
barrier ();
status2 = inb(IOC_IRQREQA);
barrier ();
outb (0, IOC_T0LATCH);
barrier ();
count2 = inb(IOC_T0CNTL) | (inb(IOC_T0CNTH) << 8);
if (count2 < count1) {
/*
* This means that we haven't just had an interrupt
* while reading into status2.
*/
if (status2 & (1 << 5))
offset = tick;
count1 = count2;
} else if (count2 > count1) {
/*
* We have just had another interrupt while reading
* status2.
*/
offset += tick;
count1 = count2;
}
count1 = LATCH - count1;
/*
* count1 = number of clock ticks since last interrupt
*/
offset += count1 * tick / LATCH;
return offset;
}
/*
* No need to reset the timer at every irq
*/
#define reset_timer() 1
/*
* Updating of the RTC. We don't currently write the time to the
* CMOS clock.
*/
#define update_rtc()
/*
* Set up timer interrupt, and return the current time in seconds.
*/
extern __inline__ unsigned long setup_timer (void)
{
extern int iic_control (unsigned char, int, char *, int);
unsigned int year, mon, day, hour, min, sec;
char buf[8];
outb(LATCH & 255, IOC_T0LTCHL);
outb(LATCH >> 8, IOC_T0LTCHH);
outb(0, IOC_T0GO);
iic_control (0xa0, 0xc0, buf, 1);
year = buf[0];
if ((year += 1900) < 1970)
year += 100;
iic_control (0xa0, 2, buf, 5);
mon = buf[4] & 0x1f;
day = buf[3] & 0x3f;
hour = buf[2];
min = buf[1];
sec = buf[0];
BCD_TO_BIN(mon);
BCD_TO_BIN(day);
BCD_TO_BIN(hour);
BCD_TO_BIN(min);
BCD_TO_BIN(sec);
return mktime(year, mon, day, hour, min, sec);
}
1.1 or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/uncompress.h
http://www.opencores.org/cvsweb.shtml/or1k/rc203soc/sw/uClinux/include/asm-armnommu/arch-a5k/uncompress.h?rev=1.1&content-type=text/x-cvsweb-markup
Index: uncompress.h
===================================================================
/*
* linux/include/asm-arm/arch-a5k/uncompress.h
*
* Copyright (C) 1996 Russell King
*/
#define VIDMEM ((char *)0x02000000)
#include "../arch/arm/drivers/char/font.h"
int video_num_columns, video_num_lines, video_size_row;
int white, bytes_per_char_h;
extern unsigned long con_charconvtable[256];
struct param_struct {
unsigned long page_size;
unsigned long nr_pages;
unsigned long ramdisk_size;
unsigned long mountrootrdonly;
unsigned long rootdev;
unsigned long video_num_cols;
unsigned long video_num_rows;
unsigned long video_x;
unsigned long video_y;
unsigned long memc_control_reg;
unsigned char sounddefault;
unsigned char adfsdrives;
unsigned char bytes_per_char_h;
unsigned char bytes_per_char_v;
unsigned long unused[256/4-11];
};
static struct param_struct *params = (struct param_struct *)0x0207c000;
/*
* This does not append a newline
*/
static void puts(const char *s)
{
extern void ll_write_char(char *, unsigned long);
int x,y;
unsigned char c;
char *ptr;
x = params->video_x;
y = params->video_y;
while ( ( c = *(unsigned char *)s++ ) != '\0' ) {
if ( c == '\n' ) {
x = 0;
if ( ++y >= video_num_lines ) {
y--;
}
} else {
ptr = VIDMEM + ((y*video_num_columns*params->bytes_per_char_v+x)*bytes_per_char_h);
ll_write_char(ptr, c|(white<<8));
if ( ++x >= video_num_columns ) {
x = 0;
if ( ++y >= video_num_lines ) {
y--;
}
}
}
}
params->video_x = x;
params->video_y = y;
}
static void error(char *x);
/*
* Setup for decompression
*/
static void arch_decomp_setup(void)
{
int i;
video_num_lines = params->video_num_rows;
video_num_columns = params->video_num_cols;
bytes_per_char_h = params->bytes_per_char_h;
video_size_row = video_num_columns * bytes_per_char_h;
if (bytes_per_char_h == 4)
for (i = 0; i < 256; i++)
con_charconvtable[i] =
(i & 128 ? 1 << 0 : 0) |
(i & 64 ? 1 << 4 : 0) |
(i & 32 ? 1 << 8 : 0) |
(i & 16 ? 1 << 12 : 0) |
(i & 8 ? 1 << 16 : 0) |
(i & 4 ? 1 << 20 : 0) |
(i & 2 ? 1 << 24 : 0) |
(i & 1 ? 1 << 28 : 0);
else
for (i = 0; i < 16; i++)
con_charconvtable[i] =
(i & 8 ? 1 << 0 : 0) |
(i & 4 ? 1 << 8 : 0) |
(i & 2 ? 1 << 16 : 0) |
(i & 1 ? 1 << 24 : 0);
white = bytes_per_char_h == 8 ? 0xfc : 7;
if (params->nr_pages * params->page_size < 4096*1024) error("<4M of mem\n");
}
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