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Message
From: cvs at opencores.org<cvs@o...>
Date: Thu Dec 1 22:45:25 CET 2005
Subject: [cvs-checkins] MODIFIED: jop ...
Date: 00/05/12 01:22:45 Modified: jop/vhdl/simulation tb_jop.vhd
Log:
Added a simple serial transmit to check jvm.asm download
Revision Changes Path
1.2 jop/vhdl/simulation/tb_jop.vhd
http://www.opencores.org/cvsweb.shtml/jop/vhdl/simulation/tb_jop.vhd.diff?r1=1.1&r2=1.2
(In the diff below, changes in quantity of whitespace are not shown.)
Index: tb_jop.vhd
===================================================================
RCS file: /cvsroot/martin/jop/vhdl/simulation/tb_jop.vhd,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -b -r1.1 -r1.2
--- tb_jop.vhd 11 May 2005 16:55:14 -0000 1.1
+++ tb_jop.vhd 1 Dec 2005 21:45:24 -0000 1.2
@@ -93,6 +93,7 @@
signal clk : std_logic := '1';
+ signal ser_rxd : std_logic := '1';
--
-- RAM connection. We use address and control lines only
@@ -110,7 +111,7 @@
cmp_jop: jop port map(
clk => clk,
- ser_rxd => '1',
+ ser_rxd => ser_rxd,
ser_ncts => '0',
ser_txd => txd,
fl_rdy => '1',
@@ -157,5 +158,24 @@
end process;
+--
+-- simulate download for jvm.asm test
+--
+process
+
+ variable data : std_logic_vector(10 downto 0);
+ variable l : line;
+
+begin
+
+ data := "11010100110";
+ wait for 10 us;
+ for i in 0 to 9 loop
+ wait for 8.68 us;
+ ser_rxd <= data(i);
+ end loop;
+
+end process;
+
end tb;
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