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    Navigation: All forums > Cvs-checkins > Message List > Message Post

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    From: cvs at opencores.org<cvs@o...>
    Date: Fri Nov 25 19:37:59 CET 2005
    Subject: [cvs-checkins] MODIFIED: or1k ...
    Top
    Date: 00/05/11 25:19:37

    Modified: or1k/or1ksim/pic pic.c
    Log:
    Avoid scheduleing too many jobs, potentially underflowing the scheduler stack




    Revision Changes Path
    1.28 or1k/or1ksim/pic/pic.c

    http://www.opencores.org/cvsweb.shtml/or1k/or1ksim/pic/pic.c.diff?r1=1.27&r2=1.28

    (In the diff below, changes in quantity of whitespace are not shown.)

    Index: pic.c
    ===================================================================
    RCS file: /cvsroot/nogj/or1k/or1ksim/pic/pic.c,v
    retrieving revision 1.27
    retrieving revision 1.28
    diff -u -b -r1.27 -r1.28
    --- pic.c 5 Jul 2005 19:51:12 -0000 1.27
    +++ pic.c 25 Nov 2005 18:37:58 -0000 1.28
    @@ -62,9 +62,9 @@
    if(cpu_state.sprs[SPR_SR] & SPR_SR_IEE) {
    TRACE("Delivering interrupt on cycle %lli\n", runtime.sim.cycles);
    except_handle(EXCEPT_INT, cpu_state.sprs[SPR_EEAR_BASE]);
    - } else if(cpu_state.sprs[SPR_PICSR] & (1 << (int)dat))
    + } else if(cpu_state.sprs[SPR_PICSR] & cpu_state.sprs[SPR_PICMR])
    /* Reschedule only if the interrupt hasn't been cleared */
    - sched_next_insn(pic_clock, dat);
    + sched_next_insn(pic_clock, NULL);
    }

    /* WARNING: Don't eaven try and call this function *during* a simulated
    @@ -81,14 +81,19 @@
    TRACE("Asserting interrupt %d (%s).\n", line,
    (cpu_state.sprs[SPR_PICMR] & (1 << line)) ? "Unmasked" : "Masked");

    + SCHED_FIND_REMOVE(pic_clock, NULL);
    +
    if ((cpu_state.sprs[SPR_PICMR] & (1 << line)) || line < 2) {
    cpu_state.sprs[SPR_PICSR] |= 1 << line;
    /* Don't do anything if interrupts not currently enabled */
    if (cpu_state.sprs[SPR_SR] & SPR_SR_IEE) {
    TRACE("Delivering interrupt on cycle %lli\n", runtime.sim.cycles);
    except_handle(EXCEPT_INT, cpu_state.sprs[SPR_EEAR_BASE]);
    - } else
    - /* Interrupts not currently enabled, retry next clock cycle */
    - sched_next_insn(pic_clock, (void *)line);
    + return;
    + }
    }
    +
    + if(cpu_state.sprs[SPR_PICMR] & cpu_state.sprs[SPR_PICSR])
    + /* Interrupts not currently enabled, retry next clock cycle */
    + sched_next_insn(pic_clock, NULL);
    }



     
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