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Message
From: OpenCores CVS Agent<cvs@w...>
Date: Sat Feb 28 16:32:56 CET 2004
Subject: [cvs-checkins] i2c/bench/verilog tst_bench_top.v wb_master_mo ...
CVSROOT: /cvsroot/rherveille
Module name: i2c
Changes by: rherveille 04/02/28 16:32:56
Modified files:
bench/verilog : tst_bench_top.v wb_master_model.v
Added files:
bench/verilog : spi_slave_model.v
Log message:
Added testbench
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