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Message
From: OpenCores CVS Agent<cvs@w...>
Date: Sat Jan 24 12:54:20 CET 2004
Subject: [cvs-checkins] pci/ pps/sw/driver/pci_bridge32_test ench/veri ...
CVSROOT: /home/oc/cvs
Module name: pci
Changes by: mihad 04/01/24 12:54:20
Modified files:
apps/sw/driver : pci_bridge32_test
bench/verilog : pci_regression_constants.v
pci_unsupported_commands_master.v system.v
top.v
doc : pci_specification.doc pci_specification.pdf
rtl/verilog : pci_bridge32.v pci_conf_space.v
pci_user_constants.v pci_wb_master.v
pci_wb_slave.v pci_wb_slave_unit.v
pci_wbs_wbb3_2_wbb2.v
sim/rtl_sim/bin: rtl_file_list.lst sim_file_list.lst
sim/rtl_sim/run: ncvlog.args run_pci_sim_regr.scr top_groups.do
Added files:
rtl/verilog : pci_spoci_ctrl.v
Log message:
Update! SPOCI Implemented!
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