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Message
From: OpenCores CVS Agent<cvs@w...>
Date: Tue Dec 9 12:55:54 CET 2003
Subject: [cvs-checkins] or1k/or1200/rtl/verilog Tag: branch_qmem or120 ...
CVSROOT: /home/oc/cvs
Module name: or1k
Changes by: simons 03/12/09 12:55:53
Modified files:
or1200/rtl/verilog: Tag: branch_qmem or1200_cpu.v
or1200_dc_ram.v or1200_dc_tag.v
or1200_dc_top.v or1200_dmmu_tlb.v
or1200_dmmu_top.v or1200_ic_ram.v
or1200_ic_tag.v or1200_ic_top.v
or1200_immu_tlb.v or1200_immu_top.v
or1200_qmem_top.v or1200_spram_1024x32.v
or1200_spram_1024x8.v or1200_spram_2048x32.v
or1200_spram_2048x8.v or1200_spram_256x21.v
or1200_spram_512x20.v or1200_spram_64x14.v
or1200_spram_64x22.v or1200_spram_64x24.v
or1200_top.v
Log message:
Mbist nameing changed, Artisan ram instance signal names fixed, some synthesis waning fixed.
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