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Message
From: OpenCores CVS Agent <cvs@w...>
Date: Thu, 16 Oct 2003 10:09:32 +0200
Subject: [cvs-checkins] camera/ ench/verilog/camera_bench_top.v tl/ver ...
CVSROOT: /home/oc/cvs
Module name: camera
Changes by: tadejm 03/10/16 10:09:32
Modified files:
bench/verilog : camera_bench_top.v
rtl/verilog : camera_cb_table.v camera_cr_table.v
camera_defines.v camera_io_calc.v
camera_wb_if.v camera_y_table.v
sim/core_sw_simulator: b_cb.dat g_cb.dat g_cr.dat
gen_yuv_rgb_files gen_yuv_rgb_files.c
r_cr.dat rgb_out.dat yuv422_to_rgb
yuv422_to_rgb.c
sim/rtl_sim/log: ncelab_xilinx.log ncsim.log ncvlog.log
sim/rtl_sim/run: ncsim.key top_groups.do
Log message:
Bug solved; counters for counting lines written in WB frame buffer didn't clear when frame finished. Added new file used in testbench, which does not cover full functionality yet.
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