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Message
From: OpenCores CVS Agent <cvs@w...>
Date: Fri, 29 Aug 2003 09:02:11 +0200
Subject: [cvs-checkins] can/rtl/verilog can_bsp.v
CVSROOT: /home/oc/cvs
Module name: can
Changes by: mohor 03/08/29 09:02:07
Modified files:
rtl/verilog : can_bsp.v
Log message:
When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.
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