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Message
From: OpenCores CVS Agent <cvs@w...>
Date: Thu, 12 Jun 2003 09:13:03 -0100
Subject: [cvs-checkins] pci/rtl/verilog pci_master32_sm_if.v
CVSROOT: /home/oc/cvs
Module name: pci
Changes by: mihad 03/06/12 09:13:02
Modified files:
rtl/verilog : pci_master32_sm_if.v
Log message:
Changed one critical PCI bus signal logic.
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