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    Navigation: All forums > Cvs-checkins > Message List > Message Post

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    From: OpenCores CVS Agent <cvs@w...>
    Date: Wed, 26 Mar 2003 12:16:31 -0100
    Subject: [cvs-checkins] pci/rtl/verilog pci_conf_space.v pci_delayed_s ...
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    CVSROOT:	/home/oc/cvs
    Module name:	pci
    Changes by:	mihad	03/03/26 12:16:30
    
    Modified files:
    	rtl/verilog    : pci_conf_space.v pci_delayed_sync.v 
    	                 pci_pcir_fifo_control.v pci_pciw_fifo_control.v 
    	                 pci_pciw_pcir_fifos.v pci_sync_module.v 
    	                 pci_wbr_fifo_control.v pci_wbw_fifo_control.v 
    	                 pci_wbw_wbr_fifos.v synchronizer_flop.v 
    
    Log message:
    	Added the reset value parameter to the synchronizer flop module.
    	Added resets to all synchronizer flop instances.
    	Repaired initial sync value in fifos.
    
    
    
    
     
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