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Hi folks,

If you read the description of the i2c_slave_model you would know it's a
simulation model.
Hence it cannot be synthesized.

Richard

> Hi folks,
>
> When I try to synthesize i2c verilog code  using Xilinx XST 6.2i, I get
> following warning and errors.. but it does simulate well in Silos.
> Pls help me.. Thank you for your help in advance.
>
>
> Started process "Synthesize".
>
>
> ======================================================
> ===================
> *                          HDL Compilation                              *
> ======================================================
> ===================
> Compiling source file "i2c_slave_model.v"
> WARNING:HDLCompilers:4 - i2c_slave_model.v line 374 Specify blocks
> are not implemented and will be ignored
> Module <i2c_slave_model> compiled
> No errors in compilation
> Analysis of file <i2c_slave_model.prj> succeeded.
>
>
> ======================================================
> ===================
> *                            HDL Analysis                               *
> ======================================================
> ===================
> Analyzing top module <i2c_slave_model>.
> WARNING:Xst:854 - i2c_slave_model.v line 126: Ignored initial
> statement.
> WARNING:Xst:916 - i2c_slave_model.v line 134: Delay is ignored for
> synthesis.
> WARNING:Xst:916 - i2c_slave_model.v line 144: Delay is ignored for
> synthesis.
> WARNING:Xst:916 - i2c_slave_model.v line 146: Delay is ignored for
> synthesis.
> WARNING:Xst:916 - i2c_slave_model.v line 164: Delay is ignored for
> synthesis.
> WARNING:Xst:916 - i2c_slave_model.v line 165: Delay is ignored for
> synthesis.
> WARNING:Xst:915 - Message (916) is reported only 5 times for each
> module.
> i2c_slave_model.v line 248: Found FullParallel Case directive in module
> <i2c_slave_model>.
> Module <i2c_slave_model> is correct for synthesis.
>
>
> ======================================================
> ===================
> *                           HDL Synthesis                               *
> ======================================================
> ===================
> INFO:Xst:1304 - Contents of register <sta> in unit <i2c_slave_model>
> never changes during circuit operation. The register is replaced by logic.
> INFO:Xst:1304 - Contents of register <d_sta> in unit
> <i2c_slave_model> never changes during circuit operation. The register
> is replaced by logic.
> INFO:Xst:1304 - Contents of register <sto> in unit <i2c_slave_model>
> never changes during circuit operation. The register is replaced by logic.
>
> Synthesizing Unit <i2c_slave_model>.
>     Related source file is i2c_slave_model.v.
> WARNING:Xst:646 - Signal <debug> is assigned but never used.
> WARNING:Xst:1780 - Signal <d_sto> is never used or assigned.
> WARNING:Xst:646 - Signal <tst_sta> is assigned but never used.
> WARNING:Xst:646 - Signal <tst_sto> is assigned but never used.
> WARNING:Xst:646 - Signal <i2c_reset> is assigned but never used.
> WARNING:Xst:646 - Signal <sda_dly> is assigned but never used.
>     Found 1-bit tristate buffer for signal <sda>.
>     Found 8-bit 4-to-1 multiplexer for signal <$COND_1>.
>     Found 8-bit adder for signal <$n0015> created at line 312.
>     Found 8-bit comparator lessequal for signal <$n0023> created at line
> 292.
>     Found 8-bit comparator lessequal for signal <$n0024> created at line
> 313.
>     Found 3-bit down counter for signal <bit_cnt>.
>     Found 1-bit register for signal <d_sta>.
>     Found 1-bit register for signal <ld>.
>     Found 32-bit register for signal <mem>.
>     Found 8-bit register for signal <mem_adr>.
>     Found 8-bit register for signal <mem_do>.
>     Found 1-bit register for signal <rw>.
>     Found 1-bit register for signal <sda_o>.
>     Found 8-bit register for signal <sr>.
>     Found 1-bit register for signal <sta>.
>     Found 3-bit register for signal <state>.
>     Found 1-bit register for signal <sto>.
>     Found 8 1-bit 2-to-1 multiplexers.
>     Summary:
> 	inferred   1 Counter(s).
> 	inferred   4 D-type flip-flop(s).
> 	inferred   1 Adder/Subtracter(s).
> 	inferred   2 Comparator(s).
> 	inferred   1 Tristate(s).
> Unit <i2c_slave_model> synthesized.
>
>
> ======================================================
> ===================
> *                       Advanced HDL Synthesis                          *
> ======================================================
> ===================
>
> Advanced RAM inference ...
> Advanced multiplier inference ...
> Dynamic shift register inference ...
>
> ======================================================
> ===================
> HDL Synthesis Report
>
> Macro Statistics
> # Adders/Subtractors               : 1
>  8-bit adder                       : 1
> # Counters                         : 1
>  3-bit down counter                : 1
> # Registers                        : 15
>  1-bit register                    : 6
>  8-bit register                    : 8
>  3-bit register                    : 1
> # Comparators                      : 2
>  8-bit comparator lessequal        : 2
> # Multiplexers                     : 2
>  2-to-1 multiplexer                : 1
>  8-bit 4-to-1 multiplexer          : 1
> # Tristates                        : 1
>  1-bit tristate buffer             : 1
>
> ======================================================
> ===================
>
> ======================================================
> ===================
> *                         Low Level Synthesis                           *
> ======================================================
> ===================
> WARNING:Xst:1426 - The value init of the FF/Latch mem_do_ren_0
> hinder the constant cleaning in the block i2c_slave_model.
>    You should achieve better results by setting this init to 1.
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <d_sta> not replaced by logic
> Signal is stuck at GND
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <sta> not replaced by logic
> Signal is stuck at GND
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <sto> not replaced by logic
> Signal is stuck at GND
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <mem_do_7> not replaced by logic
> Sources are: mem_do_ren_7:Q, mem_do_7:Q
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <mem_do_6> not replaced by logic
> Sources are: mem_do_ren_6:Q, mem_do_6:Q
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <mem_do_5> not replaced by logic
> Sources are: mem_do_ren_5:Q, mem_do_5:Q
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <mem_do_4> not replaced by logic
> Sources are: mem_do_ren_4:Q, mem_do_4:Q
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <mem_do_3> not replaced by logic
> Sources are: mem_do_ren_3:Q, mem_do_3:Q
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <mem_do_2> not replaced by logic
> Sources are: mem_do_ren_2:Q, mem_do_2:Q
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <mem_do_1> not replaced by logic
> Sources are: mem_do_ren_1:Q, mem_do_1:Q
> WARNING:Xst:528 - Multi-source in Unit <i2c_slave_model> on signal
> <mem_do_0> not replaced by logic
> Sources are: mem_do_ren_0:Q, mem_do_0:Q
> ERROR:Xst:415 - Synthesis failed
> CPU : 2.41 / 3.53 s | Elapsed : 2.00 / 3.00 s
>
> -->
>
> Total memory usage is 52148 kilobytes
>
>
> Completed process "Synthesize".
>
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>