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    Navigation: All forums > Cores > Message List > Message Post

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    From: Guy Hutchison<ghutchis@g...>
    Date: Tue Nov 13 19:00:29 CET 2007
    Subject: [oc] pseudo random generator verilog code source
    Top
    I'd try the LFSR page from Wikipedia:
    attachment-0001.html wrote:
    > > > > > Hi all,
    > > > > >
    > > > > > This will generate only one new bit per
    > > > clock.
    > > > > > Maybe you need 32 new bits per clock,
    > > > to send
    > > > > > over a network ...
    > > > > >
    > > > > > A good starting point might be AN49
    > > > from Altera.
    > > > > > > > > > > I was unable to find this on the web, > > > so I have > > > > > built my owns, > > > > > starting from there. > > > > > > > > > > Unfortunately, I cannot send the > > > sources > > > > > but I can help you with hints. > > > > > > > > > > Cheers, > > > > > Ovidiu Lupas. > > > > > > > > > > > > > > > > > > > > ----- Original Message ----- > > > > > From: Marko Mlinar <attachment-0001.html > > > > > > To: attachment-0001.html > > > > > Date: Thu, 19 Sep 2002 10:55:46 +0200 > > > > > Subject: Re: [oc] pseudo random > > > generator verilog > > > > > code source > > > > > > > > > > > > > > > > > > > > > > > Here: > > > > > > > > > > > > reg [31:0] poly; > > > > > > > > > > > > always @(posedge clk or posedge > > > reset_poly) > > > > > > if (reset_poly) poly <= #1 > > > 32'hdeaddead; > > > > > > else poly <= #1 {poly[30:0], > > > poly[17] ^ > > > > > poly[4]}; > > > > > > > > > > > > On Thursday 19 September 2002 09:54, > > > Dharmeshbhai > > > > > PATEL wrote: > > > > > > > Hi list, > > > > > > > > > > > > > > Does any one has an idea where i > > > can get the > > > > > verilog code > > > > > > source > > > > > > > for a pseudo random generator > > > (number or signal) > > > > > ? > > > > > > > > > > > > > > Please let me know. > > > > > > > > > > > > > > Thanks in advance. > > > > > > > D.PATEL > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > ___________________________________________ > > > __________________ > > > > > > > > > > > > > > > Exclusif: 75 euros remboursés sur > > > le pack > > > > > eXtense Haut Débit > > > > > > de Wanadoo ! > > > > > > > Vivez l'Internet sans contrainte en > > > bénéficiant > > > > > d'un prix > > > > > > "tout compris", > > > > > > > d'un forfait haut débit illimit? > > > d'un accès > > > > > ADSL et d'un > > > > > > Modem ADSL simple > > > > > > > ?installer ! Cliquez ici : > > > > > > > > > attachment-0001.html > > > > > > > > > > > > > > > > > > -- > > > To unsubscribe from cores mailing list > > > please visit > > > attachment-0001.html > > > > > > > > > _______________________________________________ > attachment-0001.html > -------------- next part -------------- An HTML attachment was scrubbed... URL: attachment-0001.html

    ReferenceAuthor
    [oc] pseudo random generator verilog code sourceEngineer_mohammad_adnan

    Follow upAuthor
    [oc] pseudo random generator verilog code sourceRichard Herveille

     
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