LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: so<sosostoby123@y...>
    Date: Mon Aug 13 07:05:40 CEST 2007
    Subject: [oc] the problem of wishbone-ahb bridge
    Top
    Hello all,

    I would like to use the wishbone-ahb bridge to implement the connection
    betweem wishbone bus and ARM bus.

    However, I find that the core is single tranfer function only. the burst
    tranfer function is no implement.

    I would like to implement the burst transfer function. so, please give me
    information about the burst transfer function.

    Thanks

    so



    Follow upAuthor
    [oc] the problem of wishbone-ahb bridgeSubramani_Arunachalem

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.