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Message
From: a2e at insight.rr.com<a2e@i...>
Date: Sat Jul 28 00:54:18 CEST 2007
Subject: [oc] Help with choosing a FPGA
----- Original Message -----
From: Mark McDougall<markm@v...>
To:
Date: Fri Jul 27 07:47:10 CEST 2007
Subject: [oc] Help with choosing a FPGA
> A _lot_ is going to depend on how the data is acquired and what you
> need
> to do with this data.
> Reading the data shouldn't be a problem - is 96MHz a serial or
> parallel
> stream? Do you have a clock along with the incoming data? Or will
> you have
> to sample it with a free-running clock?
> >From here-on in there's not much that can be answered wthout
> knowing what
> you need to do with the data. The speed of an FPGA design depends
> on the
> complexity of that design. Considering you have hard-disk storage
> and
> ethernet in there I'm assuming that the 96MHz is either a serial
> stream or
> bursty or you are only interested in a subset of the incoming data
> -
> you're going to be SOL if you need to process _all_ the data at
> that rate
> and then store it or send it over ethernet...
> Regards,
Thanks for the reply. The incoming data will be parallel but 'bursty.'
Also everything will be sampled on the falling edge of an external
clock pulse. As for the incoming data the only thing I want to do with
it is store it to the hard drive, no processing necessary. The
ethernet will be used at a later point to retrieve the data from the
hd and send it back to a PC, so performance issues are not as big of a
deal there. So I am guessing from what you said that the Spartan 3E
with 500K gates is enough?
My next question is about the IDE interface, I am guessing that I will
have to incorporate some type of filing system into the soft
processors code?
Thanks.
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