LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
    •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity

    •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
    •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
    •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: sathish ram<lordsathish@y...>
    Date: Wed Jul 4 18:25:57 CEST 2007
    Subject: [oc] doubt regarding RAM
    Top
    Hi all...
    I'm a beginner in this domain... i'm designing a turbo
    decoder which uses large RAM's...
    my doubt is that i have data's of variable
    word size... will there be RAM's that suit me... Is
    there any IP core that can simulate the RAM just for
    the logical verification alone...please do help me...
    Thank you...



    __________________________________________________________
    Yahoo! India Answers: Share what you know. Learn something new
    http://in.answers.yahoo.com/

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.