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From: manish.birla at siemens.com<manish.birla@s...>
Date: Mon Apr 30 13:23:52 CEST 2007
Subject: [oc] xilinx Virtex 4
Your image is nothing but data, lets say its 8 bit per pixel and your
image size is 320x240 (QVGA), so you need 76800 addresses, each 8 bit
wide. V4 devices have enough BRAM which can store this image. So
when you are generating BRAM core, you have to load it with fixed
values of your image. (I guess file extension would be .coe). Now when
you dowload bit file, that number of BRAM will be loaded with the values
that you wish to. Now you can see the output(how are you doing
this??, VGA or read from memory through LCD display).
Hope it helps.
M

----- Original Message -----
From: zaidi at um.edu.my<zaidi@u...>
To:
Date: Fri Apr 20 03:01:23 CEST 2007
Subject: [oc] xilinx Virtex 4

> hi guys,
> need ur help. I am working with this xilinx model. could somebody
> please guide
> me how to upload an image and vhdl codings into this board. My
> project is image
> processing. I have done my vhdl part and now to test it with the
> real image.
> really appreciate that guys
> thanks
>
> 776800