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Message
From: michael.sevrain at voila.fr<michael.sevrain@v...>
Date: Thu Nov 9 18:16:46 CET 2006
Subject: [oc] AVALON / WISHBONE bridge
I noted. To make transfer not DMA, it there not true problem. But my
big problem is to make transfer in more DMA. AVALON hopes the number
of byte to be transferred and WISHBONE make bagotté of the logical
signals. Before launched me in development, I wanted to know if
somebody it is already leaning on the feasibility of interphase
between the two operating modes of the buses. Thank you by advance to
agree to answer.
----- Original Message -----
From: Martin Schoeberl<martin@j...>
To:
Date: Wed Nov 8 18:45:25 CET 2006
Subject: [oc] AVALON / WISHBONE bridge
> > I am in the search of an interface between a bus AVALON and
> WISHBONE
> > with and without DMA.
> > Somebody with already developed something partially or
> entirely ?
> Wishbone is almost a subset of Avalon. Avalon comes in many
> different
> versions and one can be (more or less) directly mapped to Wishbone.
> See the Avalon specification. Should be possible with a few clicks
> in the SOPC builder.
> Martin
>
>
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