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Message
From: Richard Tierney<rt-opencores@c...>
Date: Thu Oct 26 10:29:46 CEST 2006
Subject: [oc] which the RTL code of I2C core is corrected
Mark McDougall wrote:> I've modified...
> sSCL <= scl_i;
> sSDA <= sda_i;
> to
> if scl_i = '0' then
> sSCL <= '0';
> else
> sSCL <= '1';
> end if;
> if sda_i = '0' then
> sSDA <= '0';
> else
> sSDA <= '1';
> end if;
A more compact/standard solution is to use a strength stripper from
std_logic_1164:
sSCL <= to_X01(scl_i);
sSDA <= to_X01(sda_i);
This converts a std_(u)logic value to 'X', '0', or '1', forcing L/H to
0/1, and preserving X's.
It's interesting that you have an 'H', though - presumably this is an
external signal in the testbench? If not, how does an 'H' get into the
device?
OT, but I've been watching this list for a couple of years now. I'm
sorry to have to say it, but you're going to have to create a review
procedure if you want higher-quality (read: approaching 'almost
acceptable') IP. I'm not commenting on this core in particular; I've
never looked at it.
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